TS5T Search Results

ts-82 switch

Abstract: TS-82B TS40-T TS-6-TE1Q-S TS-82-TE1Q-S TS82A ts-9 panel TS-6
Contextual Info: D FRE E Compliant LEA TS40-T Sub-miniature Toggle Switches SPECIFICATIONS CONTACT RATING: 3A @120 VAC or 28 VDC Q Contact ELECTRICAL LIFE:30,000 make-and-break cycles at full load CONTACT RESISTANCE: 20 m˖ max. initial @2-4 VDC,100 mA INSULATION RESISTANCE: 1,000 M˖ min.

Contextual Info: ISDN ST541O 2B1Q UID U INTERFACE DEVICE Introductory data sheet January 1990 INDEX DISTINCTIVE CHARACTERISTICS General features Transmission features System features GENERAL DESCRIPTION PIN FUNCTION FUNCTIONAL DESCRIPTION Digital Interfaces fiW/DSI mode jiW Control interface

ST5410

Abstract: pin diagrom of 4 bit up down counters stt4 st5410c cl-gd STS410 1554k
Contextual Info: /TT SGS-THOMSON ST5410 6 * [ S Î It iC T M 0 g S 2B1Q U INTERFACE DEVICE A D V A N C E DATA G EN E R AL FEATURES • SINGLE CHIP 2B1Q LINE CODE TR AN S­ CEIVER ■ SUITABLE FOR BOTH ISDN AND PAIR GAIN APPLICATIO NS ■ MEETS OR EXCEEDS ANSI T 1 .601 -1988

8030D

Abstract: 5001c ic pin details M13RF LC1 D18 E23378 0x2000D 747 ic XC1so 816f capacitor 1e81
Contextual Info: Preliminary Data Sheet December 2001 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

NHI-1517

Abstract: NHI-1513 NHI-1514
Contextual Info: NATIONAL HYBRID, INC. = NHî 2200 Smithtown Avenue, Ronkonkoma, NY 11779 516 981-2400 FAX 516-981-244S Sales FAX 616-981-8888 Mil-Std-1772 Certified & Qualified Mil-Std-1553/MacAir Products NHI-1513 Series Voltage Driver Single Transceivers FEATURES: 1.5 W att Total Hybrid D issipation at 25% Transm itting

stm cl-30

Abstract: THSC2 LT 7659 psb 500-1.0 highway speed checker data sheet transistor 9012 SDH 209 ses 554 transistor fcs 9012 70010 FB
Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Lucent SLC 2000 channel shelf

Abstract: transistor fcs 9013 Lucent SLC 2000 installation sts 9013 DIGRAM FOR TEST IC 324 fcs 9013 fcs 9014 J-D4N SLC 500 ELECTRONIC CIRCUIT DIGRAM transistor fcs 9012
Contextual Info: Preliminary Data Sheet, Rev. 1 October 2000 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. STS/STM Pointer Interpreter

116TGA101K100TT

Abstract: 116RL101M100TT DK0084T TS0005T CAP 0805 ATC 600F DK0009T TS0004T 116RF100M100TT ts0003 DK0008T
Contextual Info: AMERICAN TECHNICAL CERAMICS DESIGN KITS C A PA C I T O R S • R E S I S T O R S • I N D U C T O R S W W W. AT C E R A M I C S . C O M A M E R I C A N T E C H N I C A L ATC North America 631-622-4700 • sales@atceramics.com w w C E R A M I C S ATC Europe

bdm programmer mc68hc912b32

Abstract: MC68HC912B32VFU8 MC68HC912B32MFU8 MC68HC912B32FU8 MC68HC912B32CFU8 MC68HC912B32 MC68C912B32FU8 motorola MC68HC912B32 flash programmer
Contextual Info: MOTOROLA SEMICONDUCTOR Order this document by MC68HC912B32TS/D TECHNICAL DATA MC68HC912B32 Technical Summary 16-Bit Microcontroller 1 Introduction The MC68HC912B32 microcontroller unit MCU is a 16-bit device composed of standard on-chip pe­ ripherals including a 16-bit central processing unit (CPU12), 32-Kbyte flash EEPROM, 1-Kbyte RAM,

Contextual Info: rZJ SGS-THOMSON ^ 1ËI ST5410 2B1Q U INTERFACE DEVICE ADVANCE DATA GENERAL FEATURES • SINGLE CHIP 2B1Q LINE CODE TRANS­ CEIVER ■ SUITABLE FOR BOTH ISDN AND PAIR GAIN APPLICATIONS ■ MEETS OR EXCEEDS ANSI T1.601-1988 U.S. STANDARD ■ MEETS OR EXCEEDS ST/LAA/ELR/822

LT 7659

Abstract: w20338 comcode 105 736 490 JT-G706 TMXF28155 TR-62411 GR-253-CORE JT-G704 1 into 12 demultiplexer circuit diagram 80212 502
Contextual Info: Data Sheet June 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: System Design Guide October 22, 2003 Supermapper Family System Design Guide 1 Introduction The Supermapper Family System Design Guide is divided into three sections. The first section lists the main differences between the various devices within the Supermapper family. This section is geared towards those customers unfamiliar

ELECTRONIC DESIGNS INC

Abstract: 7628P
Contextual Info: ^EDI Packaging Electronic Design« Inc. Package No. 1 18 pin Sidebrazed Ceramic Dual-in-line Package 300 mils wide _ Package No. 2 28 pin Sidebrazed ^ 5 Ceramic Dual-in-line Package 1.414 1.386 • y - . r - ii - i i- ir - . r - v r I L i_ . i- . l - / Pin 1 Indicator

LT 7659

Abstract: lin bus example C codes HG123 TMXF281553BAL-2-DB SDH 209 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

LT 7659

Abstract: Lucent SLC 2000 installation LTE DL Channel Encoder transistor fcs 9012 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411 21153 specification update
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Preliminary Data Sheet March 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1+1, unprotected and ring (UPSR) network topologies.

Contextual Info: / = 7 S C S T H O M S O N ST5410 2B1Q U INTERFACE DEVICE A D V A N C E DATA G EN E R AL FEATURES • SINGLE CHIP 2B1Q LINE CODE TR AN S­ CEIVER ■ SUITABLE FOR BOTH ISDN AND PAIR GAIN APPLICATIO NS ■ MEETS OR EXCEEDS ANSI T 1 .601-1988 U.S. STANDARD ■ MEETS OR

2N3449

Contextual Info: m i l - s -19500/338 üsx7 29 September 19^5 MILITARY SPECIFICATION SS-11 CONDUCTOR DEVICE, TRAiBISTCR, FKP, GEfMANTUM, SWITCHING TVTS 2lT)kk9 i . SÇÇPS 1 . 1 This s?e ci f i îô 1 1 ss ' " e r a the detailed recjuirerienta fcr a Itrw-leTel, fcigh-apeed-avitchicig gsrzaoiua

C 945 p 331

Abstract: SHM-945MC SHM-945MM
Contextual Info: BOATEL S H M -9 4 5 Precision, High-Speed Sample-Hold Amplifiers IN N O V A TIO N a n d E X C E L L E N C E FEATURES • • • • • • 500ns maximum acquisition time to ±0.00076% Differential input ±0.0004% maximum linearity error 16-bit performance over military temperature range

Er 38 transformer

Contextual Info: rZT SGS-THOMSON ST5410 2B1Q U INTERFACE DEVICE A D V A N C E DATA G EN E R AL FEATURES . SINGLE CHIP 2B1Q LINE CODE TR AN S­ CEIVER • SUITABLE FOR BOTH ISDN AND PAIR GAIN APPLICATIONS ■ MEETS OR EXCEEDS ANSI T 1 .601-1988 U.S. STANDARD ■ MEETS OR EXCEEDS ST/LAA/ELR/822