TMXF28155 Search Results

8030D

Abstract: 5001c ic pin details M13RF LC1 D18 E23378 0x2000D 747 ic XC1so 816f capacitor 1e81
Contextual Info: Preliminary Data Sheet December 2001 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

stm cl-30

Abstract: THSC2 LT 7659 psb 500-1.0 highway speed checker data sheet transistor 9012 SDH 209 ses 554 transistor fcs 9012 70010 FB
Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Hardware Design Guide, Revision 1 May 26, 2006 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Introduction The last issue of this data sheet was October 13, 2003. A change history can be found in Section 9, Change History, on page 63. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to

Lucent SLC 2000 channel shelf

Abstract: transistor fcs 9013 Lucent SLC 2000 installation sts 9013 DIGRAM FOR TEST IC 324 fcs 9013 fcs 9014 J-D4N SLC 500 ELECTRONIC CIRCUIT DIGRAM transistor fcs 9012
Contextual Info: Preliminary Data Sheet, Rev. 1 October 2000 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. STS/STM Pointer Interpreter

0x80060

Abstract: 0x10061
Contextual Info: Supermapper Family Register Description, Revision 3 July 7, 2006 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

multiplexing demultiplexing e2

Abstract: MSP 105
Contextual Info: Product Brief August 2000 STS-1/STS-3 Framer/Multiplexer TMUX Macrocell Functional Description TMUX Introduction The TMUX is a macrocell block that is extractable from the TMXF28155 Super Mapper application specific standard product (ASSP). The TMUX multiplexer block implements SDH/

LT 7659

Abstract: w20338 comcode 105 736 490 JT-G706 TMXF28155 TR-62411 GR-253-CORE JT-G704 1 into 12 demultiplexer circuit diagram 80212 502
Contextual Info: Data Sheet June 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

PRBS20

Abstract: TS16 PRBS23 TMXF28155 JJ-20 SLC96 alarm frame format
Contextual Info: Product Description October 22, 2003 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Introduction The documentation package for the Supermapper system chip consists of the following documents: • The Supermapper Family Register Description and the Supermapper Family System Design Guide. These documents

LT 7659

Abstract: lin bus example C codes HG123 TMXF281553BAL-2-DB SDH 209 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

comcode 105 736 490

Abstract: SDH 209 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411 80212 502 2032b Ic 741 as I to v converter
Contextual Info: Preliminary Data Sheet December 2001 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

LT 7659

Abstract: Lucent SLC 2000 installation LTE DL Channel Encoder transistor fcs 9012 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411 21153 specification update
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Lucent SLC 2000

Contextual Info: Product Brief April 2002 TMXF28155 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Super Mapper Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. ■ Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Supermapper Family Register Description, Rev 1 July 19, 2004 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

RSY-5

Abstract: speex Vt-158 single slot
Contextual Info: Supermapper Family Register Description October 14, 2003 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

JC JB jt

Contextual Info: Hardware Design Guide October 13, 2003 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Introduction This document is based on the June 2002 Supermapper data sheet with some clarifications. The documentation package for the TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 system chip consists of the following documents:

Agere Ambassador

Abstract: TMXF28155 TS16 GR-253-CORE JJ20-11 ANSI T1.403
Contextual Info: Product Brief October 2000 TMXF28155 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Supermapper Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. ■ Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

59013 h 331

Abstract: 59014 c 331 comcode 105 736 490 fcs 9013 GR-253-CORE JT-G704 JT-G706 TMXL28155 TR-62411 59014 c
Contextual Info: Preliminary Data Sheet, Rev 2 June, 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

ck77

Abstract: CK51 TADM04622
Contextual Info: Data Sheet, Revision 1 August 26, 2003 TSYN03622 SONET/SDH/PDH/ATM Clock Synthesizer 1 Introduction The last issue of this data sheet was June 20, 2003. A revision history is included in 21 Revision History on page 65. Red change bars have been installed on all text, figures,

PRBS20

Contextual Info: Supermapper 155/51 Mbits/s SONET/SDH x DS3/DS2/DS1/E1/DS0 Product Brief Introduction The SONET/SDH Supermapper device family integrates the SONET/SDH section, line, path, and tributary termination functions with M13 multiplex function and the primary rate framing function. The devices interface to an

Contextual Info: Preliminary Data Sheet May 2002 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with reduced jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching

Contextual Info: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection

T400 clock

Abstract: TSWC01622 TSWC02622 TSWC03622 TSYN01622
Contextual Info: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection

TMXF84622

Abstract: TADM04622 TDAT04622 TMXF28155 TSI-16 TSWC01622 TSWC03622 TSI-16 Card
Contextual Info: Preliminary Product Brief February 2003 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with looser jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching