SX FPGAS Search Results

Motorola 68060

Abstract: AC137 35542 CPLD 7000 SERIES A54SX16-PQ208 EPM7096QC100-7 XC9500 CPLD
Contextual Info: Application Note AC137 Integrating Multiple CPLD Functions in an Actel SX Device CPLD CPLD CPLD CPLD Actel SX FPGA FPGA Introduction This application brief describes a configurable DMA Controller design for a Motorola 68060 and compares the implementation of the design in an Actel SX FPGA with

Motorola 68060

Abstract: SX FPGAs
Contextual Info: Appl i cat i o n Br i ef Integrating Multiple CPLD Functions in an Actel SX Device CPLD CPLD CPLD CPLD Actel SX FPGA FPGA Introduction This application brief describes a configurable DMA Controller design for a Motorola 68060 and compares the implementation of the design in an Actel SX FPGA with

sx08a

Abstract: ATQ100 SX32a RTSX16
Contextual Info: A p p l i c a t i on N o t e SX to SX-A Design Migration In t ro d u c t i o n • Configurable Output State During Power-Up: All outputs can be programmed to either weak resistor pull-up or weak resistor pull-down for output tri-state. Actel’s newest line of antifuse FPGAs, SX-A, is fabricated

208-Pin CQFP

Abstract: Actel PQFP208 RTSX32
Contextual Info: v2.1 SX Family FPGAs RadTolerant and HiRel Features High Density Devices • • • RadTolerant SX Family • • • • • • Tested Total Ionizing Dose TID Survivability Level Radiation Performance to 100 Krads (Si) (ICC Standby Parametric) Devices Available from Tested Pedigreed Lots

RTSX32

Abstract: RT54SX32-CQ208 trd24 RTSX16 54SX A54SX16 A54SX32 RT54SX RT54SX72S Actel PQFP208
Contextual Info: v2.1 SX Family FPGAs RadTolerant and HiRel Features High Density Devices • • • RadTolerant SX Family • • • • • • Tested Total Ionizing Dose TID Survivability Level Radiation Performance to 100 Krads (Si) (ICC Standby Parametric) Devices Available from Tested Pedigreed Lots

54SX08A

Abstract: 3A03D BC600-3 "network interface cards"
Contextual Info: Application Note Using External SRAM Memory with Actel SX/SX-A FPGAs I n tro du ct i on Today’s system designs are growing in complexity, requiring larger amounts of memory for high-performance buffers and other local data storage. System designs that require both

BC652-3

Abstract: 54SX32A 54SX32 A54SX72A-PQ208 A54SX08A A54SX72A AC150 EP20K400 EPF10K200E PQ208
Contextual Info: Application Note AC150 Using External SRAM Memory with Actel SX/SX-A FPGAs I n tro du ct i on Today’s system designs are growing in complexity, requiring larger amounts of memory for high-performance buffers and other local data storage. System designs that require both

sx08a

Abstract: RTSX16
Contextual Info: Application Note Hot-Swappable Capabilities of Actel’s SX-A and SX FPGAs Introduction Hot-Swappable-Tolerant Classification AA There is an increasing demand in the industry for systems to stay on-line during maintenance. System designers require devices to be operational when inserted or removed from

Contextual Info: BACK Introducing the SX Family of High Performance FPGAs Actel's SX FPGAs offer industry leading performance: • 4.0 nsec clock-to-output pin-to-pin • 0.6 nsec input setup time • 0.25 nsec clock skew • 320 MHz clock frequency with device capacities ranging from

74HC14 oscillator application note

Abstract: Buffer 74HC245 74HC245 application TTL Schmitt-Trigger Inverters signal path designer
Contextual Info: Application Note Using Schmitt Triggers for Low Slew-Rate Input I n tro du ct i on Actel’s SX-A and SX-S device families are designed to accommodate a variety of I/O standards. This allows users to easily integrate these FPGAs with other devices that have

SM208CQSX-ACTEL

Abstract: RTSX32SU Silicon Sculptor II AC255 RTSX-SU SM208CQSX RTSX32 AFM n silicon sculptor V4491
Contextual Info: Application Note AC255 Recommendations for Programming Actel RTSX-S, RTSX-SU, and SX-A Introduction This technical brief provides programming information and answers common questions regarding the programming of Actel RTSX-S MEC fabricated, now discontinued , RTSX-SU (UMC fabricated), and SX-A

A500K050

Contextual Info: CorePCI v5.3 Key Features PCI Specification 2.2 Compliant Zero Wait-State Burst Mode Transfers Supports Actel SX, SX-A, RTSX, ProASIC and ProASICPLUS Families Silicon-Proven 33 or 66 MHz Performance1 32-bit or 64-bit PCI Bus Memory, I/O and Configuration Command Support

function of logic probe

Abstract: jtag pull-up resistor 10K
Contextual Info: Appl i cat i o n Br i ef Using Silicon Explorer with SX FPGAs Introduction Actel’s SX FPGAs have build in probe circuitry that is accessed and controlled by Silicon Explorer, an integrated verification and logic analysis tool that attaches to a PC’s standard COM port. This application brief describes the

Contextual Info: Application Note Actel eX, SX-A and RTSX-S I/Os I n tro du ct i on V The eX, SX-A and RTSX-S devices have a variety of advanced I/O features, which are not available in other Actel devices, such as PCI compliance, slew-rate control and pull-up/pull-down resistor. Furthermore, these devices are

fpga JTAG Programmer Schematics

Contextual Info: Actel’s SX-A Family of FPGAs Price/Performance Leader in Programmable L o g i c Logic designers face many problems trying to achieve performance on programmable logic devices available today, resulting in increased total costs for product development. Even

actel fpga 54sx32

Abstract: 24v to 5v level shifter TTL to LVTTL level shifter 54SX16P
Contextual Info: Application Note Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs I n tro du ct i on In the past, bipolar circuits with a 5V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

fluke 8050a

Abstract: fluke 8050a digital multimeter Fluke 8050A multimeter A54SX08 A54SX08-2 AC138 EPM7256A E3615A
Contextual Info: Application Note AC138 Power Requirements: Actel A54SX08 vs. Altera CPLDs In t ro d u c t i o n FPGAs have traditionally been perceived as inferior in performance to CPLDs. Actel’s high-performance antifuse SX family, however, offers both superior speed and reduced

interfacing of RAM and ROM with 8086

Abstract: schematic diagram treadmill abstract for mobile bug 5 PEN PC TECHNOLOGY mobile MOTHERBOARD CIRCUIT diagram diagram of treadmill interfacing of RAM and ROM with 8086 POWER SUPPLY for Treadmill i486 sx design desktop motherboard tutorial computer motherboard circuit diagram 486
Contextual Info: E AP-399 APPLICATION NOTE Implementing Mobile Intel486 SX CPU PC Designs Using FlashFile™ Components DON VERNER SENIOR APPLICATIONS ENGINEER CHUCK BROWN SENIOR APPLICATIONS ENGINEER RAJIV PARIKH TECHNICAL MARKETING ENGINEER TONY SHABERMAN TECHNICAL MARKETING

A54SX32A

Abstract: A54SX72A PAR64 REQ64 RT54SX-S CQFP 208 PIN
Contextual Info: v2.0 HiRel SX-A Family FPGAs Features and Benefits • Leading Edge Performance • • • • • • • • • • • 215 MHz System Performance Military Temperature 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature) 240 MHz Internal Performance (Military Temperature)

54SX32

Abstract: AC146 actel fpga 54sx32 SX FPGAs TTL to LVTTL level shifter RT54SX 54SX16 54sx08
Contextual Info: Application Note AC146 Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs I n tro du ct i on In the past, bipolar circuits with a 5V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

TTL to LVTTL level shifter

Abstract: 54SX32 54SX16 54SX16P 54SX08 3.3v to 5v logic level shifter actel fpga 54sx32
Contextual Info: Appl i cat i o n Br i ef Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs Introduction In the past, bipolar circuits with a 5.0V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

54SX72

Abstract: A54SX32APQ FBGA-484 A54SX16A THERMAL Fuse m20 tf 115 c PAR64 REQ64 A54SX08A A54SX16 A54SX32A
Contextual Info: Preliminary v1.1 SX-A Family FPGAs Leading Edge Performance • Configurable I/O Support for 3.3V/5.0V PCI, LVTTL, and TTL • Configurable Weak Resistor Pullup or Pulldown for Tri-Stated Outputs at Power Up • 250 MHz System Performance • 4ns Clock-to-Out Pin-to-Pin

54SX72

Abstract: FBGA-484 A54SX32APQ208 A54SX16A
Contextual Info: Preliminary v1.1 SX-A Family FPGAs Leading Edge Performance • Configurable I/O Support for 3.3V/5.0V PCI, LVTTL, and TTL • Configurable Weak Resistor Pullup or Pulldown for Tri-Stated Outputs at Power Up • 250 MHz System Performance • 4ns Clock-to-Out Pin-to-Pin

fluke 8050a

Abstract: A54SX08 A54SX08-2 EPM7256A
Contextual Info: A ppl i cati on N ot e Power Requirements: Actel A54SX08 vs. Altera CPLDs In t ro d u c t i o n FPGAs have traditionally been perceived as inferior in performance to CPLDs. Actel’s high-performance antifuse SX family, however, offers both superior speed and reduced