SUBTRACTION Search Results

ATS diagram

Abstract: Am29325
Contextual Info: Am29325 32-Bit Floating-Point Processor DISTINCTIVE CHARACTERISTICS • • Single VLSI device perform s high-speed floating-point arithm etic - Floating-point addition, subtraction, and m u ltip lic a tio n in a single clock cycle - In te rn a l a rc h ite c tu re s u p p o rts su m -o f-p ro d u cts,

4bit alu

Abstract: k531 PC10 PC11 TC9321F
Contextual Info: TOSHIBA TC9321F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9321F SINGLE CHIP DTS MICROCONTROLLER DTS-10 The TC9321F is a 4bit CMOS microcontroller for single chip digital tuning system with built-in prescaler, PLL. The CPU has 4bit parallel addition/subtraction (Al, SI

3606

Contextual Info: PRELIMINARY IDT77V400 SWITCHStAR ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP SWITCHING MEMORY FEATURES • Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can be independently chosen for Input and Output ports • Byte Addition or Byte Subtraction for x4/x8 to x l 6/x32

1E20

Contextual Info: APPLICATION NOTE H8/300L Series Subtraction of 32-Bit Binary Numbers SUB1 Introduction 1. The software SUB1 subtracts a 32-bit binary number from another 32-bit binary number and places the result (a 32bit binary number) in general-purpose registers. 2. The arguments used with the software SUB1 are unsigned integers.

Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS385 Four independent adder/subtractors Use with two's complement arithmetic GENERAL DESCRIPTION The Am25LS15 is a serial two's complement adder/

test bench for 16 bit shifter

Abstract: processor control unit vhdl code download verilog code for floating point unit SUBTRACTION verilog code for 8051 verilog code for floating point multiplication microcontroller using vhdl 80C51 DR8051 vhdl code for 8 bit floating point processor
Contextual Info: Floating Point Arithmetic Unit ver 1.30 OVERVIEW DFPAU uses the specialized algorithms to compute arithmetic functions. It supports addition, subtraction, multiplication, division, square root, comparison, absolute value, and change sign of a number. The input numbers

Am29325

Abstract: fc 4558 AM29C33 FT28 tek 455 manual th02
Contextual Info: 40V Am 29C325 2 i C M O S 3 2 -B it Flo atin g-P o int P rocessor > 3 DISTINCTIVE CHARACTERISTICS Single VLSI device perform s high-speed single­ precision floating-point arithm etic F loating-point addition, subtraction, and m ultiplication in a single clo ck cycle

AD-E0091

Abstract: C945 HD61810
Contextual Info: HD61810 d s p The HD61810 is a single-chip general-purpose digital signal processors. High-speed floating-point ALU and MULT are provided internally to per­ form addition/subtraction and multiplication simultaneously in only one cycle, 250 ns (4 MFLOPS).

1B04 transistor

Abstract: 1B05 F003 F100 F103
Contextual Info: APPLICATION NOTE H8/300L Super Low Power Series Subtraction of Multiple-Precision Binary Numbers SUB2 Introduction The software SUB2 subtracts a multiple-precision binary number from another multiple-precision binary number and places the result in the data memory where the minuend was set.

Am9340

Abstract: AmS340 7400 signetics logical block diagram of 80286 AMG3 820Q FLOATING POINT Co Processor reverse carry addition
Contextual Info: 3,2 ' y: Am9340 Four-Bit Arithmetic Logic Unit dncfive Characteristic* P ro v id es addition and subtraction and two lo g ic fu n c­ tions. Typical add tim e of only 20 n s a nd subtract time of only 25ns for 4 bits. Provision m ade for full lo o k -a h e a d arithm etic ove r 1 6 bit words without additional carry pa cka ge .

Contextual Info: MITSUBISHI MICROCOMPUTERS 740 Family Reference Programs 3.9 16-Bit Subtract BCD (1) Description Subtraction of 16-bit BCD data is performed. (2) Explanation The contents of WORK01 +1 and WORK01 are subtracted from the contents of WORK00 +1 and WORK00, respectively, and the results are stored to WORK00 +1 and WORK00, respectively.

ph10 led display 16 x 32

Abstract: TM2X opa 6111 LED IR RX MTU428 COUNTER LED bcd
Contextual Info: MYSON TECHNOLOGY MTU428 Preliminary 4-Bit Micro-Controller with LCD Driver FEATURES (1) Low power dissipation. (2) Powerful instruction set (148 instructions): • Binary addition, subtraction, BCD adjustment, logical operation in direct addressing mode and index

CSBARBT

Abstract: MC68332 CHIP-SELECT CSBARBT DSA0039265
Contextual Info: SECTION 2 NOMENCLATURE The following tables show the nomenclature used in the MC68332 User’s Manual. 2.1 Symbols and Operators Table 2–1 Symbols and Operators Symbol Function + Addition - Subtraction two’s complement or negation * Multiplication /

am29325

Abstract: H-14 AM29325GC WF023740 ScansUX970 TB000640
Contextual Info: Am29325 32-Bit Floating-Point Processor • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products, Newton-Raphson division

Contextual Info: APPLICATION NOTE M16C/60 Series and M16C/20 Series General-purpose Program for Subtracting 32 Bits 1. Abstract This program performs a 32-bit unsigned subtraction using registers. This program performs a 32-bit unsigned subtraction between memory locations.

29C325

Contextual Info: Am29C325 CMOS 32-B¡t Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle Internal architecture supports sum-of-products,

Contextual Info: Am29C325 C M O S 3 2 -B it F lo a tin g -P o in t P ro ce sso r F IN A L D IS T IN C T IV E C H A R A C T E R IS T IC S • • Single VLSI device pe rfo rm s high-speed singlepre cisio n flo a tin g -p o in t arithm etic F lo a tin g -p o in t add ition, subtraction, and m ultiplicatio n

Contextual Info: ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP ADVANCED INFORMATION IDT77V400 SWITCHING MEMORY Integrated D e v ie TechnoJogy, lie . FEATURES: • Byte Addition or Byte Subtraction fo r x8 to x16/x32 U topia conversion capability • Internal header C yclical R edundancy C he ck CRC and

001C

Abstract: 1B04 1B05
Contextual Info: APPLICATION NOTE H8/300L Series Subtraction of Multiple-Precision BCD Numbers SUBD2 Introduction 1. The software SUBD2 subtracts a multiple-precision binary-coded decimal (BCD) number from another multipleprecision BCD number and places the result in the data memory where the minuend was set.

001C

Abstract: 1B04 1B05
Contextual Info: APPLICATION NOTE H8/300L Series Subtraction of Multiple-Precision Binary Numbers SUB2 Introduction 1. The software SUB2 subtracts a multiple-precision binary number from another multiple-precision binary number and places the result in the data memory where the minuend was set.

bin2BCD16

Abstract: bcd binary conversion application note AVR204 binary bcd conversion 0938A-A bcd arithmetic BCD2bin16 binary to bcd conversion 16 bits 16 bit binary bcd conversion bcd adder
Contextual Info: AVR204: BCD Arithmetics Features Introduction • Conversion 16 Bits ↔ 5 Digits, This application note lists routines for BCD arithmetics. A listing of all implementations with key performance specifications is given in Table 1. 8 Bits ↔ 2 Digits • 2-Digit Addition and Subtraction

Contextual Info: TOSHIBA TC9321F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9321F SINGLE CHIP DTS MICROCONTROLLER DTS-10 The TC9321F is a 4bit CMOS microcontroller for single chip digital tuning system with built-in prescaler, PLL. The CPU has 4bit parallel addition/subtraction (Al, SI

Contextual Info: TC93P27F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC93P27F DTS Microcontroller DTS-21 The TC93P27F is a 4-bit CMOS microcontroller for single-chip digital tuning systems, featuring a built-in 230-MHz prescaler, PLL, and LCD drivers. The CPU has 4-bit parallel addition and subtraction

LF2249

Abstract: 16 stage pipeline TMC2249 digital mixer
Contextual Info: LF2249 LF2249 DEVICES INCORPORATED 12 x 12-bit Digital Mixer 12 x 12-bit Digital Mixer DEVICES INCORPORATED FEATURES DESCRIPTION user control for subtraction of products. The sum of the products can also be internally rounded to 16 bits during the accumulation process.