AM29325 Search Results

ATS diagram

Abstract: Am29325
Contextual Info: Am29325 32-Bit Floating-Point Processor DISTINCTIVE CHARACTERISTICS • • Single VLSI device perform s high-speed floating-point arithm etic - Floating-point addition, subtraction, and m u ltip lic a tio n in a single clock cycle - In te rn a l a rc h ite c tu re s u p p o rts su m -o f-p ro d u cts,

am29325

Contextual Info: Am29325 DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum -of-products, Newton-Raphson division

Contextual Info: Am 29332 32-Bit Arithmetic Logic Unit • Single Chip, 32-Bit ALU Supports 8 0 -9 0 ns m icrocycle tim e fo r the 32-bit data path. It is a com binatorial ALU with equal cy­ cle tim e fo r all instructions. Flow -through A rchitecture A com binatorial ALU with tw o input data ports and

k0312

Abstract: yb06 YB04 YA16 apl 117 yb07 y802 AWa3 74N10 V18-Y3S
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY • 64 x 18 Bit W ide R egister File The Am29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined Data Path The Am 29C334 can be configured to support either a

29C325

Contextual Info: Am29C325 CMOS 32-B¡t Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle Internal architecture supports sum-of-products,

AXP 209

Abstract: UPD65031 UPD65070 UPD65006 intel 80487 SCX6206 HG62B40 UPD65022 mb86901 UPD71641
Contextual Info: _► ADVANCED Device to PGA Socket Cross Reference INTERCONNECTIONS. 5 Energy Way, P.O. Box 1019, West Warwick, RI 02893 USA Tel. 800-424-9850 / 401-823-5200 •Fax 401-823-8723 ■Email advintcorp@aol.com ■Internet http://www.advintcorp.com Actel Device#

YB17

Abstract: A09 N03 yb04 b09 n03 GE H11 A10 K/1/64W am29c332
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit W ide R egister File The Am 29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined D ata Path The Am 29C 334 can be configured to support either a

Contextual Info: Am29338 32-Bit Byte Queue ADVANCE INFO R M ATIO N A synchronous and Synchronous O peration - S upports com m unication between system s w ith differ­ e nt clocks and different bus w idths Retransm it - Data can be read out repeatedly Horizontal Cascading

d82L

Abstract: ir3104
Contextual Info: Am29332 DISTINCTIVE CHARACTERISTICS • • • Single Chip, 32-Bit ALU S upports 8 0 -9 0 ns m icrocycle tim e for the 32-bit data path. It is a com binatorial ALU w ith equal cy­ cle tim e fo r all instructions. Flow -through A rchitecture A com binatorial ALU with tw o input data ports and

TC001107

Abstract: Modified Booth Multipliers DB21 OA10 OA21 block diagram 8 bit booth multiplier am29c332
Contextual Info: Am29C332 CMOS 32-Bit Arithmetic Logic Unit ADVANCE INFORMATION Supports All Data Types It supports one-, two-, three- and four-byte data for all operations and variable-length fields for logical operations. Multiply and Divide Support Built-in hardware to support tw o-bit-at-a-tim e m odi­

VC 5022

Abstract: 1N30S4 CD3024 Am29500 H32 305 5V L RSN 312 H 24 2910A AM29520A PD3024 am29325
Contextual Info: A m 29520A /A m 29521A Multilevel Pipeline Registers DISTINCTIVE CHARACTERISTICS • • • Four 8 -bit w ide registers Provides tem porary storage to r d a ta /in stru ctio n d e la y/ queuing Single 4 level or dual 2 level structure • • • • H igh-speed IM O X ECL internal technology, TT L com ­

Am29325

Abstract: H-14
Contextual Info: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle

Yb03

Abstract: Am29325 AWA3 D01136 AM2930 AM29323 AWA CAPACITOR yb16 C6113 YB02
Contextual Info: A m 29334 Four-Port D ual-Access Register File • • Fast W ith an access tim e o f 24 ns, the Am 29334 supports 80-90 ns m icrocycle tim e when used with the Am29300 Family for 32-bit systems. 64 x 18 Bits W ide R egister File The Am29334 is a high-performance, high-speed, dual­

AM29C10

Contextual Info: Am29C332 CM O S 32-Bit Arithmetic Logic Unit ADVANCE INFO R M ATIO N Single Chip, 32-B it ALU Standard product supports 110 ns microcycle time for th e 32-bit data path. It is a com binatorial ALU with equal cycle tim e for all instructions. Speed S elect supports 80-ns system cycle tim e

ya10

Abstract: YA-10 RB2A AM 29300 Family AM 29300 ALU
Contextual Info: Am29334 Four-Port D ual-Access Register File • • • Fast With an access tim e of 24 ns, the Am 29334 supports 80-90 ns rmcrocycle time when used with the Am29300 Family for 32-bit systems. 6 4 x 1 8 Bits W ide R egister File The Am 29334 is a high-perform ance, high-speed, dual­

Am29337

Contextual Info: Am29337 16-Bit Bounds Checker Double Comparator Out-of-Bounds Flag - C om pares a 16-bit input num ber with a low er lim it and an upper limit - Flags values th a t are outside the bounds of a lower and an upper limit Cascadable Compares Signed or Unsigned Numbers

Contextual Info: NOV 2 i « # 1 Am29C325 CMOS 32-Bit Floating-Point Processor > 3 DISTINCTIVE CHARACTERISTICS Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle

Am29500

Abstract: RSN 312 H 24 RSN 315 H 41 CD3024 VC 5022 AM29520A/B3A rsn 315 AM29520A BDR02270 PD3024
Contextual Info: Am29520A/Am29521A Multilevel Pipeline Registers DISTINCTIVE CHARACTERISTICS • • • Four 8 -b it w ide registers Provides tem porary storage to r d a ta /in stru ctio n d e la y/ queuing Single 4 level or dual 2 level structure • • • • H igh-speed IM O X ECL internal technology, TT L com ­

modified booth circuit diagram

Abstract: mps 0814 D829 Modified Booth Multipliers 0A31 DA10 functional diagram of ALU 32 bit booth multiplier for fixed point Booth Multiplier encoder multiplexer d8297
Contextual Info: Am29332 3 2-B it Arithm etic Logic Unit • • • Supports All Data Types It supports one-, two-, three- and four-byte data for all operations and variable-length fields for logical operations. Multiply and Divide Support Built-in hardware to support tw o-bit-at-a-tim e m odi­

Am29C323

Abstract: 07B30 Am29C323-2 AM29C516
Contextual Info: Am29C323 CMOS 32-Bit Parallel Multiplier PRELIMINARY Registers can be m ade transparent - Input and output registers can be made transparent independently to elim inate unwanted pipeline delay Supports T w o ’s Com plem ent, Unsigned or Mixed Num bers D ata Integrity Through M aster-Slave M ode and Pari­

Am29337

Abstract: AM29337DC Am29C00 am29c332
Contextual Info: Am29337 H 16-Bit Bounds Checker Double Comparator - Compares a 16-bit input number with a lower limit and an upper limit • • C a s c a d a b le • • - 16-bit cascadable to longer words Out-of-Bound« Flag - Flags values that are outside the bounds of a lower