STANDBY Search Results

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current

d3905

Contextual Info: TL7759C SUPPLY VOLTAGE SUPERVISOR D3905. JANUARY 1991-REVISED SEPTEMBER 1991 D OR P PACKAGE TOP VIEW * Power-On Reset Generator * Automatic Reset Generation After Voltage Drop * Precision Threshold Voltage 4.55 V ±120 mV * Low Standby Current, . . 20 ^A

SN75435

Abstract: SN74ls194
Contextual Info: SN75435 QUADRUPLE PERIPHERAL DRIVER WITH OUTPUT FAULT PROTECTION SLRS003A- D2848, FEBRUARY 1985 - REVISED NOVEMBER 1989 Saturating Outputs With Low On-State Resistance Very Low Standby Power. . . 53 mW Max High-impedance MOS- or TTL- Compatible Inputs Standard 5-V Supply Voltage

Contextual Info: TICPAL16L8-55C, TICPAL16R4 55C TICPAL16R6-55C, TICPAL16R8 55C STANDARD CMOS PAL CIRCUITS D 30 62, N O V E M B E R 1 9 8 7 - R E V IS E D O C T O B E R 198 9 T IC P A L1 6 L 8 ' J OR N P A C KA G E • Standard 20-Pin PAL Family • Virtually Zero Standby Power

54256AP

Abstract: TC54256AF 54256a TC54256P 54256AF tmm23256p 27256D tc54256ap
Contextual Info: TOSHIBA TC54256AP/AF SILICON STACKED GATE CMOS 32,768 WORD x 8 BIT ONE TIME PROGRAMMABLE READ ONLY MEMORY D e s c rip tio n The TC54256AP/AF is a 32,768 word x 8 bit one time programm able read only m em or/ m olded in a 28-pin plastic package. The TC54256AP/AF’s access time is 200ns and it has a low power standby m ode which reduces the power dissipation without

Contextual Info: TLD369 DUAL CCD IMAGE SENSOR CLOCK DRIVER D 3 2 9 6 . JUNE 198 9 Dual Inverting MOS Driver P PACKAGE TOP VIEW Low Standby Power Dissipation NC Versatile Interface Circuit for Use between TTL Levels and Level-Shifted High-Current, High-Voltage Systems 1A

d3004 transistor

Abstract: P3004 mofset
Contextual Info: SN75372 DUAL MOSFET DRIVER SLLSQ25A- P3004. JULY 1986 • Dual Circuits Capable of Driving Hlgh-Capacltance Loads at High Speeds • Output Supply Voltage Range up to 24 V D OR P PACKAGE TOP VIEW • Low Standby Power Dissipation 1A[ 1 E[ 2 U V CC1 7 ]1 Y

Contextual Info: UM23L4101 PRELIMINARY 524,288 X 8 BIT LOW VOLTAGE CMOS MASK ROM Features • ■ ■ ■ 524,288 x 8-bit organization Single +3V power supply Access time: 250 ns max. Current: Operating: 15mA (max.) Standby: 10 ¿¿A (max.) ■ Three-state outputs for wired-OR expansion

UM61256FK-15

Abstract: um61256fs 15 UM61256FS-15 um61256f um61256fk15 UM61256FK UM61256FM-25 um61256 UM61256FK-12 um61256fs
Contextual Info: UM61256F Seríes 32K X a High Speed CMOS SRAM Features • * ■ ■ ■ Single +5V power supply ■ Access times: 12 /15/2 5 ns max. ■ Current: Operating: 150mA (max.) Standby: 12mA (max.) ■ Full static operation, no clock o r refreshing required Directly TTL compatible: All inputs and outputs

um611864

Contextual Info: a S amar a a P R E L IM IN A R Y - UM611864 64K X 18 Bit Synchronous High Speed CMOS SRAM Features Single +5V power supply Fast access times: 9/11 ns Current: Operating: 275mA Standby: 95mA Synchronous self-timed write Individual byte write control Asynchronous output enable

74BCT29827

Abstract: LT 7242
Contextual Info: SN74BCT29827A, SN74BCT2982BA 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS D 2 9 7 7 . APRIL 1 9 8 7 -R E V IS E D M A Y 1 9 8 8 DW OR N T P A C K A G E 1 BiCMOS Design Substantially Reduces Standby Current TO P V IEW G ill 1 A id 2 A2 C 3 A3 C 4

UM621024B

Abstract: UM621024 um621024bm-70l
Contextual Info: UM621024B Seríes 128K X 8 CMOS SRAM Features • Single +5V power supply ■ Access times: 55/70 ns max. ■ Current: Low power version: Operating: 70mA Standby: 100(iA Very low power version: Operating: 70mA Standby: 25 (¿A * Full static operation, no clock or refreshing

mk5089n

Abstract: 5089 DTMF TCM5089 encoder dtmf 5089 Mostek 5089 M5089 Mostek MK5089 mk50 DTMF 5089
Contextual Info: TCM 5089 TONE ENCODER D2651, NOVEMBER 1982-REVISED DECEMBER 1990 Device Powered Directly by Telephone or Small Batteries • Keyboard or Electronic Input Capability • Dual-Tone and Single-Tone Capability • Minimal Standby Power Requirement • Total Harmonic Distortion Meets EIA

UM61M512K-15

Abstract: UM61M512K15 UM61M512 um61M512K UM61M512-20 um61m UM61M51
Contextual Info: UM61M512 Seríes 64KX 8, 3.3V I/O High Speed CMOS SRAM Features • Single +5V power supply * Access times: 15/20 ns max. ■ Current: Operating: 160mA (max.) Standby. 10mA (max.) ■ Full static operation, no clock or refreshing required ■ 3.3V I/O com patible

Contextual Info: UM23C24100 1,572,864 X 16/3,145,728 X 8 BIT CMOS MASK ROM P R E L IM IN A R Y Features • 1,572,864 x 16/3,145,728 x 8-bit organization * Single +5V power supply * Access time: 120ns max. ■ Current: Operating: 60mA (max.) Standby: 50 <;A (max.) ■ Three-state outputs for wired-OR expansion

Contextual Info: TC9805P TENTATIVE D A T A TC9805P is a 24-pin CMOS programmable logic device PLD based on EEPROM cells. It has a zero-standby function. Designed using Toshiba's original technology, this device features low power dissipation and inputs that are compatible w ith TTL, NMOS, and CMOS output

TMM24256P

Abstract: AF150 TC54256P TTL af tc54256ap
Contextual Info: TOSHIBA MOS MEMORY PRODOCTS TC54256AP/AF-150 DESCRIPTION The TC54256AP/AF is a 32,768 wo r d x 8 bit one time programmable read only memory, and molded in a 28 pin plastic package. The TC54256AP/AF&#39;s access time is 150ns and has low power standby mode which reduces the power dissipation without increasing access

44-PIN dice

Contextual Info: UM 23C16100A 1,048,576 X 16/2,097,152 x 8 BIT CMOS MASK ROM Features • 1,048,576 x 16 bit or 2,097,152 x 8 bit organization ■ Single +5V power supply ■ Access time: 120ns max. ■ Current: Operating: 50 mA (max.) _ Standby. 100 uA (max.) ■ Mask programmed _for chip enable (Power-down) C E / CE,

usb3503

Abstract: USB3503AI-1-GL-TR USB3503A-1-GL-TR USB3503A hsic Application hsic circuit diagram of usb repeater USB HSIC VDD12B gps drive microcontroller navigation
Contextual Info: USB3503 USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications PRODUCT FEATURES Data Brief Features „ „ „ „ Integrated USB 2.0 Compatible 3-Port Hub. HSIC Upstream Port Advanced power saving features — 1 A Typical Standby Current

Contextual Info: MSP430F42x0 MIXED SIGNAL MICROCONTROLLER SLAS455C − MARCH 2005 − REVISED AUGUST 2005 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D D D Active Mode: 250 µA at 1 MHz, 2.2 V Standby Mode: 1.1 µA Off Mode RAM Retention : 0.1 µA

30INT

Abstract: TTL LA 78141 la 78141 pinout "CMOS GATE ARRAY" fuji st zo 607
Contextual Info: TICPAL22V10Z-25C, TICPAL22V10Z-30I EPIC CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPS007C – D3323, SEPTEMBER 1989 – REVISED FEBRUARY 1992 • • • • • • Virtually Zero Standby Power CLK/I I I I I I I I I I I GND Propagation Delay Time: I, I/O to I/O in the Turbo Mode

MP318EI

Contextual Info: www.ti.com FEATURES • • • • • • ESD Protection for RS-232 I/O Pins – ±15 kV Human-Body Model – ±8 kV (IEC 61000-4-2, Contact Discharge) – ±15 kV (IEC 61000-4-2, Air-Gap Discharge) 300-µA Operating Supply Current 1-µA Low-Power Standby (With Receivers

Contextual Info: SN74BCT29843 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993 • • • DW OR NT PACKAGE TOP VIEW BiCMOS Process With CMOS Inputs and TTL Outputs Substantially Reduces Standby Current Input Has 50 kΩ

Contextual Info: M OSEL V I T E L I C P R E LIM IN A R Y V62C3181024 2 .7 VOL T 1 2 8 K X 8 STA TIC R A M • Packages - 32-pin TSOP Standard - 32-pin 440 mil SOP (525 mil pin-to-pin) Features ■ High-speed: 35, 70 ns ■ Ultra low DC operating current of 25 mA (max.) - TTL Standby: 3 mA (Max.)