SN74ALVCH3 Search Results

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N
Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW 74ALVCH373
Contextual Info: SN74ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

A115-A

Abstract: C101 SN74ALVCH32374
Contextual Info: SN74ALVCH32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES283B – OCTOBER 1999 – REVISED OCTOBER 2002 D D D D D D Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 4.2 ns at 3.3 V ±24 mA Output Drive at 3.3 V

Contextual Info: SN74ALVCH373 OCTAL TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCES116G − JULY 1997 − REVISED AUGUST 2003 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

A115-A

Abstract: C101 SN74ALVCH32973 1D2A1 SN74ALVCH32973KR
Contextual Info: SN74ALVCH32973 16-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH EIGHT INDEPENDENT BUFFERS www.ti.com SCES436C – APRIL 2003 – REVISED SEPTEMBER 2004 • FEATURES • • Member of the Texas Instruments Widebus+ Family Bus Hold on Data Inputs Eliminates the Need

Contextual Info: SN74ALVCH32501 36ĆBIT UNIVERSAL BUS TRANSCEIVER WITH 3ĆSTATE OUTPUTS SCES144E − OCTOBER 1998 − REVISED AUGUST 2003 D Member of the Texas Instruments D D D D D Bus Hold on Data Inputs Eliminates the Widebus+ Family UBT  Transceiver Combines D-Type

1A12

Abstract: 1A15 1A17 SN74ALVCH32501
Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES144B – OCTOBER 1998 – REVISED JUNE 1999 D D D D D Member of the Texas Instruments Widebus  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process UBT  (Universal Bus Transceiver)

ach245

Abstract: 74ALVCH32245ZKER A115-A C101 SN74ALVCH32245 SN74ALVCH32245KR
Contextual Info: SN74ALVCH32245 32ĆBIT BUS TRANSCEIVER WITH 3ĆSTATE OUTPUTS SCES282C − OCTOBER 1999 − REVISED OCTOBER 2003 D Member of the Texas Instruments D D D D D Latch-Up Performance Exceeds 100 mA Per Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V

Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118D - JULY 1997 - R EVISED JA N U A R Y 1999 EPIC Enhanced-Performance Implanted CMOS Subm icron Process DGV, DW, OR PW PACKAGE (TOP VIEW) Bus Hold on Data Inputs Elim inates the

Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118E – JULY 1997 – REVISED OCTOBER 1999 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown

ACH973

Abstract: 3LOE diode A115-A C101 SN74ALVCH32973 SN74ALVCH32973KR
Contextual Info: SN74ALVCH32973 16-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH EIGHT INDEPENDENT BUFFERS www.ti.com SCES436C – APRIL 2003 – REVISED SEPTEMBER 2004 • FEATURES • • Member of the Texas Instruments Widebus+ Family Bus Hold on Data Inputs Eliminates the Need

Contextual Info: SN74ALVCH32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES283D – OCTOBER 1999 – REVISED AUGUST 2004 • FEATURES • Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 4.2 ns at 3.3 V

74ALVCH32973

Contextual Info: SN74ALVCH32973 16-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH EIGHT INDEPENDENT BUFFERS www.ti.com SCES436C – APRIL 2003 – REVISED SEPTEMBER 2004 • FEATURES • • Member of the Texas Instruments Widebus+ Family Bus Hold on Data Inputs Eliminates the Need

Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES144G – OCTOBER 1998 – REVISED OCTOBER 2004 FEATURES • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in

Contextual Info: SN74ALVCH32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES283D – OCTOBER 1999 – REVISED AUGUST 2004 • FEATURES • Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 4.2 ns at 3.3 V

Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES144G – OCTOBER 1998 – REVISED OCTOBER 2004 FEATURES • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in

Contextual Info: Contents Page ALVC Gates/Octals SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC14 SN74ALVC32 SN74ALVC74 SN74ALVC125 SN74ALVC126 SN74ALVC244 SN74ALVCH244 SN74ALVC245 SN74ALVCH245 SN74ALVCH373 SN74ALVCH374 2–2 Quadruple 2-Input Positive-NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES144A – OCTOBER 1998 – REVISED FEBRUARY 1999 D Member of the Texas Instruments D D D Bus Hold on Data Inputs Eliminates the Widebus  Family EPIC  Enhanced-Performance Implanted

74ALVCH32501ZKFR

Abstract: A115-A SN74ALVCH32501 SN74ALVCH32501KR
Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES144G – OCTOBER 1998 – REVISED OCTOBER 2004 FEATURES • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in

Contextual Info: SN74ALVCH32245 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES282D – OCTOBER 1999 – REVISED SEPTEMBER 2004 • FEATURES • • • • • Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V

ACH973

Abstract: *ach973 74ALVCH32973ZKER SN74ALVCH32973KR 74ALVCH32973
Contextual Info: SN74ALVCH32973 16-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH EIGHT INDEPENDENT BUFFERS www.ti.com SCES436C – APRIL 2003 – REVISED SEPTEMBER 2004 • FEATURES • • Member of the Texas Instruments Widebus+ Family Bus Hold on Data Inputs Eliminates the Need

Contextual Info: SN74ALVCH32244 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES281D – OCTOBER 1999 – REVISED SEPTEMBER 2004 • FEATURES • • • • • Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V

74ALVCH374

Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: SN74ALVCH32244 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES281D – OCTOBER 1999 – REVISED SEPTEMBER 2004 • FEATURES • • • • • Member of the Texas Instruments Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V