SN74ALVC00 Search Results

Contextual Info: SN74ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

A115-A

Abstract: C101 SN74ALVC00 SN74ALVC00RGYR
Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: Contents Page ALVC Gates/Octals SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC14 SN74ALVC32 SN74ALVC74 SN74ALVC125 SN74ALVC126 SN74ALVC244 SN74ALVCH244 SN74ALVC245 SN74ALVCH245 SN74ALVCH373 SN74ALVCH374 2–2 Quadruple 2-Input Positive-NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contextual Info: SN74ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN74ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources DMS Support Enhanced Product-Change Notification

Contextual Info: SN74ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources DMS Support Enhanced Product-Change Notification

SN74ALVC00

Abstract: SN74ALVC00IDRG4Q1 SN74ALVC00IDRQ1 SN74ALVC00IPWRQ1
Contextual Info: SN74ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: SN74ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

SN74ALVC00

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES115C – JULY 1997 – REVISED AUGUST 1998 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: SN74ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: SN74ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES115C – JULY 1997 – REVISED AUGUST 1998 D EPIC Enhanced-Performance Implanted D D D D, DGV, OR PW PACKAGE (TOP VIEW CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources DMS Support Enhanced Product-Change Notification

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2