PMC20 Search Results

Contextual Info: PMC201 Diodes Single-Phase High-Speed Bridge Rectifier Military/High-RelN I O Max.(A) Output Current9.6 V(RRM)(V) Rep.Pk.Rev. Voltage2.5k t(rr) Max.(s) Rev.Rec. Time2.0u @I(F) (A) (Test Condition)400m @I(R) (A) (Test Condition)800m V(FM) Max.(V) Forward Voltage5.0

respack 8

Abstract: drawn pin configuration of ic 7408 drawn pin out configuration of ic 7408 Oupiin 0603 104P CONNECTOR, 32P FREEDM-32P672 M66EN PM2352 PM7380
Contextual Info: PM2352 FREEDM -32P672 PRELIMINARY DESIGN DOCUMENT PMC2001841 ISSUE 1 DEVELOPMENT KIT BOARD PM7380 FREEDM -32P672 DEVELOPMENT KIT BOARD DESIGN DOCUMENT ISSUE 1: DECEMBER 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PM9355

Abstract: PM9351 PM935X ETT1 PM9311 PM9312 PM9313 PM9352 PM9353 PM9354
Contextual Info: PM935X TTX, PM931X ETT1 PRELIMINARY APPLICATION NOTE PMC2001264 ISSUE 1 DESIGNING LINECARDS THAT WORK WITH BOTH ETT1 AND TTX SWITCH CORES PM9351, PM9352, PM9353, PM9354, PM9355, PM9311, PM9312, PM9313, PM9315 TTX and ETT1 Chip Sets Designing Linecards that Work With

Contextual Info: PMC201X Diodes Single-Phase High-Speed Bridge Rectifier Military/High-RelN I O Max.(A) Output Current9.6 V(RRM)(V) Rep.Pk.Rev. Voltage2.5k t(rr) Max.(s) Rev.Rec. Time250u @I(F) (A) (Test Condition)400m @I(R) (A) (Test Condition)800m V(FM) Max.(V) Forward Voltage5.0

Contextual Info: PMC200 200 mm Manual Cryogenic Probe System DATA SHEET The PMC200 is the ideal solution for testing wafers and substrates up to 200 mm in a cryogenic environment. Specially designed for laboratory requirements, it supports a wide range of measurements, including I-V, C-V and RF, and can be used for probing down to

PMC102

Abstract: 5664 c 5664 PMC101 PMC103 PMC105 PMC201 PMC203 unitrode voltage module 935 1575
Contextual Info: PMC101 -PMC105 PMC101X-PMC105X PMC201 -PMC203 PMC201X-PMC203X RECTIFIER ASSEMBLIES Single Phase Full Wave Bridges PMC Power Modules High Voltage, High Current FEATURES DESCRIPTION • • • • • The PMC POWER M O D U LE is a densely packaged sing le phase high voltage bridge

V850E/IA1

Contextual Info: User’s Manual TM V850E/IA1 32-Bit Single-Chip Microcontrollers Hardware µPD703116 µPD703116 A µPD703116(A1) µPD70F3116 µPD70F3116(A) µPD70F3116(A1) Document No. U14492EJ3V0UD00 (3rd edition) Date Published February 2003 N CP(K) Printed in Japan

555 triangular wave

Abstract: TMS0100 703114gc uPD703114 PD70F3114 V850E1 OE100 9346A U15195EJ5V0UD00 3PHASE RIGHT-LEFT MOTOR CONTROL
Contextual Info: User’s Manual V850E/IA2 32-Bit Single-Chip Microcontrollers Hardware µPD703114 µPD703114 A µPD70F3114 µPD70F3114(A) Document No. U15195EJ5V0UD00 (5th edition) Date Published August 2005 N CP(K) 2001 Printed in Japan [MEMO] 2 User’s Manual U15195EJ5V0UD

PC HARD DISK CIRCUIT diagram

Abstract: laptop HARD DISK CIRCUIT diagram sgpio cpld usb to db9 internal connection diagram HARD DISK power supply diagram HARD DISK with power supply diagram hard disk CIRCUIT diagram sata hard disk connector wire diagram SFF-8470 AUTOMATED FAN SPEED CONTROLLER BLOCK DIAGRAM
Contextual Info: PM2319-KIT SXP 36x3G Evaluation Kit Preliminary SXP 36x3G Evaluation Kit FEATURES for all high speed serial interfaces. It also contains a DB9 connector for a 16550 UART interface and an EJTAG connector for debugging the integrated MIPS-based processor. The SXP 36x3G Evaluation Kit PM2319KIT allows evaluation of the PM8387

SPECTRA-9953

Abstract: STS-192 STS-48 PM5317
Contextual Info: PM5317 SPECTRA-9953 Advance SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s FEATURES • Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner. • Designed for use in interface applications operating at serial

sofaware mips

Abstract: visionice MIPS32 MSP5000 security access voice control system
Contextual Info: MSP5000 Multi-Service Processor Released MSP for Multi-Service Platforms and Intelligent IADs GENERAL Today’s networks must support multiservice applications such as combined packetized voice and data while maintaining service level agreements. The challenge is to design products that

te0509

Abstract: 7253X
Contextual Info: 7A ug us t, 20 05 09 :4 7: 19 PM PM7389 FREEDM 84A1024 Data Sheet Released ed ne sd ay ,1 FREEDM -84A1024 DATA SHEET Released Issue 4: March 2003 Do wn lo ad ed by Co nt e nt Te a m of Pa rtm in er In co n W Frame Engine and Datalink Manager 84A1024 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

jat52

Abstract: TA-TSY-000191 PM5319 PM5319-NI PMC-2030860
Contextual Info: us t, 20 04 09 :2 1: 24 PM ARROW 622 ASSP Telecom Standard Product Data Sheet Released es da y, 10 Au g PM5319 gi es , In c. on Tu ARROW 622 Released Issue No. 2: July 2004 Do wn lo ad ed by Sc o tt E st es of i 2T ec h no lo ASSP Telecom Standard Product Data Sheet

Diode LT 228d

Abstract: 1E2H SMD making code DV5
Contextual Info: 7: 43 AM PM4323 OCTLIU LT Device ASSP Telecom Standard Product Data Sheet Released ,0 ay co n Th ur sd OCTLIU LT 1M ay ,2 00 8 01 :0 PM4323 of Pa rtm in er In Device Telecom Standard Product Proprietary and Confidential Released Issue No. 5: April 2008 Do

LR 4100 RELAY

Abstract: PM8316PGI 315-B PM8316-PGI
Contextual Info: PM8316 TEMUX 84 RELEASED DATA SHEET ISSUE 9 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX 10 :3 5: 14 PM PMC-1991437 ,1 3M ar ch ,2 00 6 PM8316 co n Mo nd ay TEMUX 84 DATA SHEET Do wn l oa de d by C on te nt T ea m of Pa rtm in er In HIGH DENSITY T1/E1 FRAMER WITH

RM5261

Abstract: R4000 R4650 R5000 RM5200 RM5231
Contextual Info: RM5261 Microprocessor with 64-Bit System Bus Data Sheet Released RM5261 RM5261™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

vortex modem

Abstract: "Base Transceiver Station" 3g modem circuit 3g router DSLAM JT-G704 PM4354 PM7328 PM7350 PIC-22
Contextual Info: PM4354 COMET-QUAD Four Channel Combined E1/T1/J1 Transceiver/Framer FEATURES • Provides a two-frame payload slip buffer to allow independent backplane and line timing. • Automatically generates and transmits DS-1 performance report messages to ANSI T1.231 and ANSI T1.408

thermal overload relay fas

Abstract: CRC-32 PM7383 TD422
Contextual Info: PM7383 FREEDM-32A256 RELEASED DATASHEET PMC-2010336 ISSUE 1 FRAME ENGINE AND DATA LINK MANAGER 32A256 PM7383 FREEDM -32A256 FRAME ENGINE AND DATALINK MANAGER 32A256 DATASHEET PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 2: AUGUST 2001 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

0X020F

Abstract: ANSI/EOS/ESD S3.1 M2080 MMC2075 MMC2080
Contextual Info: EVB2080 Evaluation Board EVB2080 User’s Manual Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described

33091

Abstract: CRC-32 PM7382
Contextual Info: PM7382 FREEDM-32P256 RELEASED DATA SHEET PMC-2010333 ISSUE 3 FRAME ENGINE AND DATA LINK MANAGER 32P256 PM7382 FREEDM -32P256 FRAME ENGINE AND DATALINK MANAGER 32P256 DATA SHEET RELEASED ISSUE 3: AUGUST 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

ltsx e3

Abstract: ltsx e3 PM7329 SCR SS 3328 LTSX LTCE epd 47- 50 2LW MARKING CODE wrr AND I.610 0X00 PM7329
Contextual Info: PM7329 S/UNI-APEX-1K800 DATASHEET PMC-2010141 ISSUE 2 ATM TRAFFIC MANAGER AND SWITCH PM7329 TM S/UNI - APEX-1k800 S/UNI-APEX-1K800 ATM/PACKET TRAFFIC MANAGER AND SWITCH DATASHEET ISSUE 2: JUNE, 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 2, September 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

API NETWORKS

Abstract: E9000 Marvell MIPS64 RM9200A
Contextual Info: RM9200A Released AM Integrated Multiprocessor DUAL E9000 CORES CACHE AND I/O COHERENCY PMC-Sierra’s RM9200A Integrated Processor is a high performance 64-bit MIPS-based dual-microprocessor with integrated memory and I/O interfaces. Each core provides: • 1 GHz operating frequency.