E9000 Search Results

API NETWORKS

Abstract: E9000 Marvell MIPS64 RM9200A
Contextual Info: RM9200A Released AM Integrated Multiprocessor DUAL E9000 CORES CACHE AND I/O COHERENCY PMC-Sierra’s RM9200A Integrated Processor is a high performance 64-bit MIPS-based dual-microprocessor with integrated memory and I/O interfaces. Each core provides: • 1 GHz operating frequency.

Marvell

Abstract: MIPS64 RM-90 RM9000x2 Integrated Multiprocessor E9000
Contextual Info: RM9000x1 Preliminary RM9000x1 Integrated Microprocessor FEATURES E9000 CPU CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9000x1 Integrated Processor is a high performance 64-bit MIPS -based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the

Marvell

Abstract: MIPS64 RM9100A RM9200A 64120A 64-ENTRY
Contextual Info: RM9100A Released Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

FLOATING POINT Co Processor

Contextual Info: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

J-STD-020D

Abstract: A09K
Contextual Info: Technical Data Sheet Advanced Power Top View LEDs EHP-A09K-Y8TC-E9000BBDAE1K-1T8-AM Lead Pb Free Product - RoHS Compliant Applications Feattures P-LCC-6 package. Small package with high efficiency. Colorless clear resin. Wide viewing angle 120o. Precondition: Bases on JEDEC J-STD

Marvell

Abstract: MIPS64 RM9100A RM9200A
Contextual Info: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

marvell ethernet switch

Abstract: Marvell MIPS64
Contextual Info: RM9100 Released RM9100 Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100 Integrated Processor is a high performance 64-bit MIPS -based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9100™

API NetWorks

Abstract: Marvell MIPS64 RM9200A E9000
Contextual Info: RM9200A Released Integrated Multiprocessor FEATURES DUAL E9000 CORES CACHE AND I/O COHERENCY PMC-Sierra’s RM9200A Integrated Processor is a high performance 64-bit MIPS-based dual-microprocessor with integrated memory and I/O interfaces. Each core provides:

EHP-A09K-Y8TC-E9000BBDAE1K-1T8-AM

Contextual Info: Technical Data Sheet Advanced Power Top View LEDs EHP-A09K-Y8TC-E9000BBDAE1K-1T8-AM Lead Pb Free Product - RoHS Compliant Applications Feattures P-LCC-6 package. Small package with high efficiency. Colorless clear resin. Wide viewing angle 120o. Precondition: Bases on JEDEC J-STD

9T58K0504G37

Abstract: GE 190B1704G1 HANDLE CR306D002LVH GE 7700-Line 302A3600YDP207 MC 1200 Motor Control Board 190B1704G1 302A3600YDP7 190B1704G2 9T58K0507G38
Contextual Info: Motor Control Centers–Low Voltage Section 12: Motor Control Centers—Low Voltage E9000 Evolution/8000/Spectra Low Voltage Motor Control Centers Product References: Engineered Products Catalog Application and Selection Guide Application and Selection Guide

Contextual Info: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

RM9200

Abstract: hypertransport Marvell MIPS64
Contextual Info: RM9100 Released RM9100 Integrated Microprocessor FEATURES E9000 CORE PMC-Sierra’s RM9100 Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200 Integrated Multiprocessor.

Contextual Info: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

TEkelec

Contextual Info: DIELECTRIC MATERIALS Contents MICROWAVE DIELECTRIC RESONATORS CONTENTS CONTENTS PRODUCTION & QUALITY SYSTEM INTRODUCTION / USER GUIDE E2000/E3000 SERIES E4000 SERIES E5000 SERIES E9000 SERIES SALES OFFICES WEB SITE: http://www.tekelec-temex.com 13-1 AMERICA: +1 602 780 1995

SA6954

Abstract: S29WS064N S29WS128N S29WS256N WS128N FFC00
Contextual Info: S29WSxxxN MirrorBit Flash Family S29WS256N, S29WS128N, S29WS064N 256/128/64 Megabit 16/8/4 M x 16-Bit CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory PRELIMINARY Distinctive Characteristics Architectural Advantages „ Single 1.8 volt read, program and erase (1.70 to

MIPS64

Abstract: "network interface cards"
Contextual Info: RM9120 Preliminary FEATURES AM RM9120 Integrated Microprocessor NETWORKING INTERFACES • A CPU core compatible with the MIPS64 Instruction Set Architecture. • High-speed integrated DDR SDRAM, SysAD, Local Bus, HyperTransport, and Ethernet MAC interfaces. Option

MIPS64

Abstract: RM9220
Contextual Info: RM9220 Released 54 4: :3 05 04 • Supports 25.6 Gbps memory. • Supports DDR SDRAM options. • Supports 2 Gbytes using 512 Mbit SDRAM and 4 Gbytes using 1 Gbit SDRAM. ADDITIONAL FEATURES • Provides 8 Kbytes integrated low latency scratch RAM. • Provides an integrated on-chip EJTAG

C000H-DFFFH

Abstract: 24Blocks FB0000h-FBFFFFh 9F0000h-9FFFFFh C10000h-C1FFFFh FF4000h-FF5FFFh 8a0000h8affffh
Contextual Info: ADVANCED INFORMATION MX29LW128T/B/U/D 128M-BIT [16M x 8 / 8M x 16] SINGLE VOLTAGE 3V ONLY PAGE MODE FLASH MEMORY FEATURES GENERAL • 8M word x 16 Bit /16M Byte x 8 Bit switchable Power Supply Voltage - VCC=2.7V to 3.6V for read, erase and program operation

Contextual Info: NOT RECOMMENDED FOR NEW DESIGN SC473 Single-Phase Single Chip Graphics Core Power Supply POWER MANAGEMENT Description Features Single-Phase Solution with Integrated Drivers Hysteretic Control for Fast Transient Response SmartDriver for reduced EMI True Differential Remote die Sensing

JESD97

Abstract: M29DW128F TSOP56 6C80
Contextual Info: M29DW128F 128 Mbit 16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block 3V supply Flash memory Feature summary • Supply voltage – VCC = 2.7V to 3.6V for Program, Erase and Read – VPP =12V for Fast Program (optional) ■ Asynchronous Random/Page Read

SA452

Abstract: SA336 SA424 120R S29GL512N SA487 EE8000 a78000a7ffff c58000c5ffff SA4871
Contextual Info: Am29LV2562M Data Sheet RETIRED PRODUCT This product has been retired and is not available for designs. For new and current designs, S29GL512N supersedes Am29LV2562M and is the factory-recommended migration path. Please refer to the S29GL512N Data Sheet for specifications and ordering information. Availability of this

S29WS256N

Abstract: S71WS512NE0BFWZZ
Contextual Info: S71WS512NE0BFWZZ Stacked Multi-Chip Product MCP Flash Memory and pSRAM CMOS 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory and Pseudo-Static RAM ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION MCP Features The S71WS512 Series is a product line of stacked Multi-Chip

M29W128FL

Abstract: Memory Protection Devices M29W128FH JESD97 M29W128F TSOP56
Contextual Info: M29W128FH M29W128FL 128 Mbit 8Mb x 16 or 16Mb x 8, Page, Uniform Block 3V Supply Flash Memory Feature summary • Supply voltage – VCC = 2.7 to 3.6V for Program, Erase and Read – VPP =12V for Fast Program (optional) ■ Asynchronous Random/Page Read

M50FLW080

Abstract: M50FLW080A M50FLW080B PLCC32 TSOP32
Contextual Info: M50FLW080A M50FLW080B 8 Mbit 13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors 3V Supply Firmware Hub / Low Pin Count Flash Memory FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ FLASH MEMORY – Compatible with either the LPC interface or the FWH interface (Intel Spec rev1.1)