48MBIT Search Results

Contextual Info: VM305 Y I£ J S £ ;. WRITE/SERVO PHASE-LOCKED OSCILLATOR July, 1991 F EA TU R ES • • • • • • C om patible with Both 2,7 and (1,7) RLL Codes Operates at D ata Rates from 10 to 48Mbit/s Pin-selectable Input-to-Output Frequency Ratio 24-lead SOIC Package

Contextual Info: MAR 1 6 Ufj January 1993 PRELIMINARY ^ÉL M icro Linear ML6017 48 Mbps Read Channel Filter/Equalizer GENERAL D ESCRIPTIO N FEATURES The ML6017 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 48Mbits/s, with

Contextual Info: VM 305 ^ VTC IIncorporated n r r WRITE/SERVO PHASE-LOCKED OSCILLATOR & PRELIMINARY FEATURES • • • • • • • • • April, 1990 CONNECTION DIAGRAM Compatible With Both 2,7 and (1,7) RLL Codes Operates at Data Rates from 10 to 48Mbit/s Pin-selectable Input-to-Output Frequency Ratio

Contextual Info: ^ . VTC Incorporated VM5621/VM5622 2,7 ENCODER/DECODER V FEATURES • Encodes and Decodes IBM (2,7) Code • 48Mbit/sec Maximum Code Rate • Soft-Sector 2T Frequency Address Mark Generation • Preamble lock time: 64-T (T = one period of 2F clock) • 4T (1000.) Preamble Frequency Detection

Contextual Info: August 1994 ^ÉL M icro Linear ML6017 48 Mbps Read Channel Filter/Equalizer G EN ERAL D ESCRIPTIO N FEATURES The ML601 7 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 48Mbits/s, with

736MHZ

Contextual Info: August 1994 % M i c r o Linear ML6017 48 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML601 7 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 48Mbits/s, with

Contextual Info: July 1992 A D V A N C ED IN FRO M A TIO N Micro Linear ML6007 48 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The M L6007 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 48Mbits/s, with

Contextual Info: K8D6x16UTM / K8D6x16UBM FLASH MEMORY Document Title 64M Bit 8M x8/4M x16 Dual Bank NOR Flash Memory Revision History Revision No. History Draft Date Remark 0.0 Initial Draft January 10, 2002 Preliminary 1.0 Final Specification May 22, 2002 Final 1.1 Revised

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Max Data Rate 54MHz in full-time Random Access Mode May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit

Contextual Info: M58CR064C, M58CR064D M58CR064P, M58CR064Q 64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Package – VDD = 1.65V to 2V for Program, Erase and Read – VDDQ = 1.65V to 3.3V for I/O Buffers – VPP = 12V for fast Program (optional)

JESD97

Abstract: M29DW128F TSOP56 6C80
Contextual Info: M29DW128F 128 Mbit 16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block 3V supply Flash memory Feature summary • Supply voltage – VCC = 2.7V to 3.6V for Program, Erase and Read – VPP =12V for Fast Program (optional) ■ Asynchronous Random/Page Read

TSOP-20 FOOTPRINT

Abstract: tray datasheet bga 8x9 JESD 95-1, SPP-010 PL032J AM29PDL S29PL-J
Contextual Info: S29PL-J 128/128/64/32 Megabit 8/8/4/2 M x 16-Bit CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control S29PL-J Cover Sheet Data Sheet (Advance Information) Notice to Readers: This document states the current technical specifications regarding the Spansion

K8P2815UQB

Contextual Info: K8P2815UQB FLASH MEMORY 128Mb B-die Page NOR Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

JESD97

Abstract: M29DW128F TSOP56 esn 234 D2578 5PWA
Contextual Info: M29DW128F 128 Mbit 16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block 3V supply Flash memory Features summary • Supply Voltage – VCC = 2.7V to 3.6V for Program, Erase and Read – VCCQ= 1.65V to 3.6V for Input/Output – VPP =12V for Fast Program (optional)

MS82V48540

Contextual Info: PEDS82V48540-01 1Semiconductor MS82V48540 This version: Jul. 2001 Preliminary 393,216-Word x 32-Bit × 4-Bank FIFO-SGRAM GENERAL DESCRIPTION The MS82V48540 is a 48-Mbit system clock synchronous dynamic random access memory. In addition to the conventional random read/write access function, the MS82V48540 provides the automatic row address increment

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Data Rate May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit • 2,073,600 x 12-bit Operating Modes:

DQ141

Contextual Info: M29DW128F 128 Mbit 16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block 3V Supply, Flash Memory PRELIMINARY DATA Features summary • Supply Voltage – VCC = 2.7V to 3.6V for Program, Erase and Read – VCCQ= 1.65V to 3.6V for Input/Output – VPP =12V for Fast Program (optional)

manual for logo 230RC 6ED1-052-1FB00-0BA6

Abstract: siemens Logo 230RC user manual how to program siemens Logo 230RC manual LOGO TD text display siemens Logo 230RC manual instruction 6ED1055-1MD00-0BA1 Wiring Diagram SIEMENS logo 230RC siemens Logo 230RC service manual siemens Logo 230RC manual 6ED1052-1HB00-0BA6
Contextual Info: LOGO! _ Preface 1 _ Getting started with LOGO! LOGO! installation and 2 _ wiring 3 _ Programming LOGO! LOGO! 4 _ LOGO! functions UDF User-Defined 5 _

TSOP-20 FOOTPRINT

Abstract: SA1115 pl032j
Contextual Info: S29PL-J 128/128/64/32 Megabit 8/8/4/2 M x 16-Bit CMOS 3.0-Volt only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control ADVANCE INFORMATION Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described

Contextual Info: V T C Inc. V a lu e th e C u s to m e r VM5621/VM5622 2,7 ENCODER-DECODER July, 1992 A B S O L U T E M A X IM U M R A T IN G S VM5621 Power Supply Voltages (VEE - 0V) . .OVto 7V Storage Temperature Range

BA254

Abstract: ba148 TC58 TC58FVM7B2A TC58FVM7T2A TC58FVM7T2AFT65 TSOP56-P-1420-0 BA224 458000h TC58FVM7T2AFT
Contextual Info: TC58FVM7 T/B 2AFT(65/80) TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 128-MBIT (16M x 8 BITS/8M × 16 BITS) CMOS FLASH MEMORY DESCRIPTION The TC58FVM7T2A/B2A is a 134217728-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 16777216 words × 8 bits or as 8388608 words × 16 bits. The TC58FVM7T2A/B2A features

AM29PDL

Abstract: PL032J S29PL-J pl127
Contextual Info: S29PL-J 128/128/64/32 Megabit 8/8/4/2M x 16-Bit CMOS 3.0 Volt-Only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control S29PL-J Cover Sheet Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion

PL129J

Abstract: AMD marking CODE flash AM29DL PL032J70BAI12 SA1115 Spansion s29pl127j AM29PDL PL032J TSOP-20 FOOTPRINT Pl064j
Contextual Info: S29PL127J/S29PL129J/S29PL064J/S29PL032J 128/128/64/32 Megabit 8/8/4/2 M x 16-Bit CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control Data Sheet PRELIMINARY Notice to Readers: This document indicates states the current technical

Contextual Info: CYF0018V CYF0036V CYF0072V 18/36/72-Mbit Programmable FIFOs 18/36/72-Mbit Programmable FIFOs Features Functional Description • Memory organization ❐ Industry’s largest first in first out FIFO memory densities: 18-Mbit, 36-Mbit, and 72-Mbit ❐ Selectable memory organization: x 9, × 12, × 16, × 18, × 20,