SYSAD45 Search Results

VR12000

Abstract: uPD30710 0PC25 SGI DSD uPD30700 tag 9022 VR10000 VR5000TM uPD30710RS-300 U12703EJ1V0DS00
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD30700,30700L,30710 VR10000TM, VR12000TM 64-BIT MICROPROCESSORS DESCRIPTION The µPD30700 and 30700L VR10000 and µPD30710 (VR12000) are new members of NEC’s VR seriesTM RISC (Reduced Instruction Set Computer) microprocessors. These new high-performance 64-bit microprocessors employ

Contextual Info: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

Contextual Info: ID T 7 9 R 4 7 0 0 6 4 -B it RISC M icro p ro cesso r FEATURES * * Low-power operation 3.3V power supply, forthe “RV” part 5Vpower supply, for the “R” part Dynamic power management Standby mode reduces internal power True 64-bit microprocessor 64-bit integer operations

National Semiconductor PC16550D UART

Abstract: K2687 CL-GD5465 VR5000 PC16550D R5000 VRC5074 R4311 H49-M97 CL-GD546
Contextual Info: VRC5074 System Controller June 1998 Data Sheet 1.0 Introduction 1.1 The VRC5074 System Controller is a software-configurable chip that directly connects the V R5000 CPU to SDRAM memory, a PCI Bus, and a Local Bus, without external logic or buffering. From the CPU’s viewpoint, the controller acts as a memory controller, DMA controller, PCI-Bus host bridge, and Local-Bus host bridge. From the viewpoint of PCI agents, the controller acts as master and target on the PCI Bus. The

RC64475

Contextual Info:



   
 
               
 

  ◆ Implements MIPS-III Instruction Set Architecture ISA 3.3V I/O ◆ Software compatible with entire RISController Series of Embedded Microprocessors

ACT5231

Abstract: ACT-5231PC-133F22C R4700 R5000 RM5231
Contextual Info: ACT5231 32-Bit Superscaler Microprocessor Features • Full militarized QED RM5231 microprocessor ■ Pinout compatible with popular RM5230 with split power sup plies 2.5V and 3.3V ■ Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle

RM5261

Abstract: R4000 R4650 R5000 RM5200 RM5231
Contextual Info: RM5261 Microprocessor with 64-Bit System Bus Data Sheet Released RM5261 RM5261™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 2, September 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

qed rm5200

Contextual Info: RM5271 Microprocessor with External Cache Interface Document Rev. 1.3 Date: 02/2000 FEATURES • High-performance floating point unit - up to 700 MFLOPS — Single cycle repeat rate for common single precision operations and some double precision operations

ACT5270

Abstract: R4700 R5000
Contextual Info: ACT5270 64-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5270 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ ● Supports ■ ● 133, 150, 200 MHz operating frequencies – Consult Factory for

C435A

Abstract: IDT79RC64475-250 IDT79RC64475 R3000 R4700 RC3041 RC4640 RC4650 a2w4 b f44
Contextual Info:


 
         Version 1.0 September 1998 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1997 Integrated Device Technology, Inc.

zHM003

Abstract: RC32364 RC4640 RC4650 RC5000 RC64474 RC64475 RC64575 PQFP-128 footprint 0464c
Contextual Info: RC64574 RC64575™ Advanced 64-bit Microprocessors Product Family Preliminary Information* Featur tures ◆ Big- or Little-endian capability RC5000 compatible memory management – On-chip 48-entry, 96-page TLB, for advanced operating system support – Compatible with major operating systems:

79RC64

Contextual Info:


  
   

            
 

 ◆ Implements MIPS-III Instruction Set Architecture ISA 3.3V with 5V tolerant I/O ◆ Software compatible with entire RISController Series of

Contextual Info: IDT79R4400 IDT79RV4400 THIRD GENERATION 64-BIT SUPER-PIPELINED RISC MICROPROCESSOR Integrated Device Technology, Inc. FEATURES: • Standard operating system support includes: — Microsoft Windows” NT — UNISOFT UNIX™ System V.4 • Fully software compatible with R3000A 32-bit RISC

Contextual Info: RC64474 RC64475™ Prelim inary RISController™ Embedded 64-bit Microprocessor, based on RISCore4000™ Features * Im plem ents M IP S -III Instruction S e t A rch ite cture ISA 3 .3 V I/O High p e rfo rm a n ce 6 4 -b it m icroprocessor, b a se d on the

MIPS R4X00 16-bit

Contextual Info: ORÏON EMBEDDED 64-BIT RISC ORION MICROPROCESSOR FEATURES: IDT79R4650 Preliminary • Low-power operation - Less than 2W peak internal power at 100MHz - Active power management powers-down inactive units - Standby mode power consumption <200mW • Upward software compatible with IDT RISController Family

RC64475

Abstract: RC32364 RC4640 RC4650 RC64474 RC64575 pinout socket 754
Contextual Info: RC64474 RC64475™ RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000TM Features Software compatible with entire RISController Series of Embedded Microprocessors ◆ Industrial temperature range support ◆ Active power management – Powers down inactive units, through sleep-mode feature

XXXW

Abstract: EQUIVALENT TIMER IC WITH CD 4060 mab100-m
Contextual Info: RISController Embedded 64-bit Microprocessor, based on RISCore4000™ Features Implements M IPS-III Instruction Set Architecture ISA 3.3 V with 5 V tolerant I/O * High performance 64-bit microprocessor, based on the RISCore4000 ' ' RC64474™ RC64475™

RM5260

Abstract: CQFP 208
Contextual Info: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one

ACT7000ASC

Contextual Info: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●

uPD30412L

Abstract: UPD30412LRJ250
Contextual Info: CHAPTER 1 1.1 G EN ERA L Introduction The /j PD30412, 30412L V r4400MC processor supports interfaces to secondary cache, system interlace, and boot time mode control. This document describes the connection and operation of each of these interfaces. Remark

Contextual Info: DATA SH EET MOS INTEGRATED CIRCUIT ¿¿PD 3 0 4 1 2 , 30412L VR4400M C 64-BIT M ICRO PRO CESSO R The Vr4400MC is one of the NEC's Vr series™ RISC Reduced Instruction Set Computer type micro­ processors. It is a high-performance 64-bit microprocessor which uses the RISC architecture developed by

4000SC

Contextual Info: UPD30401 V R 4000SC 64-Bit Microprocessor Preliminary Hardware User's Manual Publication ID: IEU-1331 Publication Date: December 1, 1992 Company: N E C ELECTRONICS INC Th is title page is provided as a service by Inform ation Handling S ervices and displays