PIN COMPATIBLE" SHARP Search Results

TW8816B3

Contextual Info: NOT RECOMMENDED FOR NEW DESIGNS RECOMMENDED REPLACEMENT PARTS TW8816B3 Pin Compatible OR TW8835 (Not Pin Compatible) TW8816 - LCD Flat Panel Processor with built-in MCU, NTSC/PAL/SECAM Decoder, T-CON and Analog RGB Support Intersil Confidential. Information may change without

DNA 1001 DL

Abstract: DSB45 D-33A D35B 60 74
Contextual Info: LH543611/21 512x36x2/1024x36 x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally Upwards-Compatible with Sharp LH5420 and LH543601, but Deeper • Expanded Control Register that is Fully Readable as well as Writable

PC MOTHERBOARD ibm rev 1.2

Abstract: TGUI9400CXi TGUI9440 TGUI9400 vesa local bus design TGUI9400CX rev 1.5 ibm crt Trident Microsystems IBM motherboard rev 1.2
Contextual Info: TGUI944ÎT GUI Accelerator Features Complete Hardware Compatibility Highly Integrated Design • Third pin-to-pin compatible member of the TGUI94XX family • PCI rev 2 and VL Bus 2.0 compliant • Supports VESA DDC and VAFC standards • 100% IBM® VGA compatible on BIOS,

PC MOTHERBOARD ibm rev 1.2

Abstract: TGUI9400CXi PC MOTHERBOARD ibm rev 1.5 TGUI9400CX trident rev 1.5 ibm motherboard vesa local bus design TGU19440 TGUI9440 TGUI94XX
Contextual Info: TGUI9440~ GUI Accelerator Features Complete Hardware Compatibility Highly Integrated Design • Third pin-to-pin compatible member of the TGUI94XX family • PCI rev 2 and VL Bus 2.0 compliant • Supports VESA DDC and VAFC standards • 100% IBM® VGA compatible on BIOS,

AD9706BCP-PCB

Abstract: AD9705BCPZRL7 AD9706 AD9707 1004F AD9705BCP-PCB AD9707BCPZRL7
Contextual Info: Preliminary Technical Data FEATURES 1 Pin-compatible Family Low Power Member of Pin Compatible TxDAC Product Family Power Dissipation @ 3.3 V: 21 mW @ 10 MSPS 24 mW @ 25 MSPS 30 mW @ 50 MSPS Sleep Mode: 5 mW @ 3.3 V Supply Voltage: 1.7 V to 3.6 V SFDR to Nyquist:

intel 27512 eprom

Abstract: EPROM 27512
Contextual Info: CMOS 512K 64K FEATURES • 65,536 x 8 bit organization • Access times: Single +5 V power supply High speed programming: SHARP original programming algorithm • • Three-state outputs TTL compatible I/O • Pin compatible with ¡27512 • Packages: EPROM

D35B 60 74

Abstract: D35B 60 D33A D26A D28B D31A D35B D26B D12A D15A
Contextual Info: ADVANCE INFORMATION LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible, Deeper 0.7µ-Technology Replacements for Sharp LH5420 and LH543601 • Functionally Upwards-Compatible from LH5420 and

Contextual Info: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible 0.7|x-Technology Replacement for Sharp LH5420 The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

adc audio i2s 8 channel controller

Abstract: Car security system block diagram digital security system block diagram bt.656 interface Techwell TW2815 Techwell digital video recorder surveillance system diagram Video Decoders TW2816
Contextual Info: Techwell Mixed Signal Semiconductor Solutions TECHWELL SECURITY Security Surveillance IC Solutions PRELIMINARY TW2815 Features 4 Channel Video Decoders and Audio Codecs For Security Applications * Pin to pin compatible with the TW2816 Target Applications Standalone DVR

1m x 16 memory module

Contextual Info: LR0G732108XG2 JX T SHARP 8M 2 x1 M x 32 Flash Memory Module Preliminary Data Sheet FEATURES PIN ASSIGNMENT • Built With LH28F008SC, 40-pin TSOP Flash Mem­ ory Devices • Low Power Dissipation • All Inputs and Outputs Are Fully TTL And CMOS Compatible

A12E

Contextual Info: PRELIMINARY LH538700A • 1,048,576 words x 8 bit organization • Access time: 100 ns MAX. PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW • Power consumption: Operating: 550 mW (MAX.) Standby: 550 [iW (MAX.) • Static operation • TTL compatible I/O

D35B

Abstract: D35B 60 D11A D12A D15A D18A LH5420 LH543601 D-33A
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

D35B

Abstract: D10A D11A D12A D15A LH5420 LH543601 D23B
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

Contextual Info: ADVANCE INFORMATION ^-LH540215/25 512 x 18 /1 0 2 4 x 18 Synchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 15/20/25/35 ns • Pin-Compatible Drop-In Replacements for IDT72215A/25A FIFOs; Delault Operating Mode is Functionally IDT-Compatible

TW2816

Abstract: Techwell techwell tw2816 DVR block diagram L 656 L TW2815 BT 656 PIN DIAGRAM 10-BitADCs Video Decoders digital security system block diagram
Contextual Info: Techwell TW2816 4 Channel Video Decoders For Security Applications * Pin to pin compatible with the TW2815 Target Applications The TW2816 includes four high quality NTSC/PAL video decoders that convert analog composite video signals to digital component YCbCr data

LH52252A

Abstract: LH52252
Contextual Info: LH52252A FEATURES • Low Power Standby When Deselected • TTL Compatible I/O • 5 V ± 1 0 % Supply • Fully Static Operation • Common I/O for Low Pin Count • JEDEC Standard Pinouts • Packages: 24-Pin, 300-mil DIP 24-Pin, 300-mil SOJ FUNCTIONAL DESCRIPTION

12A57

Contextual Info: PRELIMINARY LH538700A FEATURES • 1,048,576 words x 8 bit organization • Access time: 100 ns MAX. CMOS 8M (1M x 8) MROM PIN CONNECTIONS TOP VIEW 32-PIN DIP 32-PIN SOP • Power consumption: Operating: 550 mW (MAX.) I— 1 * • Static operation • TTL compatible I/O

Contextual Info: CMOS 8M 1M x 8 MROM FEATURES • 1,048,576 words x 8 bit organization • Access time: 150 ns (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW s • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 (iW (MAX.) • Static operation • TTL compatible I/O

Contextual Info: LH540235/45 FEATURES • Fast Cycle Times: 20/25/35 ns • Pin-Compatible Drop-In Replacements for IDT72235B/45B FIFOs • Choice of IDT-Compatible or Enhanced Operating Mode; Selected by an Input Control Signal • Device Comes Up into One of Two Known Default

Contextual Info: LH540215/25 FEATURES • Fast Cycle Times: 15/20/25/50 ns • Pin-Compatible Drop-In Replacements for IDT72215A/25A FIFOs; Default Operating Mode is Functionally IDT-Compatible • Device Comes Up into Known Default State at Reset; Programming is Allowed, but is not Required

ZD433

Contextual Info: CMOS 2M 128K x 16 MROM FEATURES • 131,072 words x 16 bit organization • Access time: 100 ns (MAX.) PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW f • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Power consumption:

Contextual Info: CMOS 24M 1.5M x 16 MROM FEATURES • 1,572,864 words PIN CONNECTIONS x 16 bit organization 42-PIN DIP TOP VIEW • Access time: 150 ns (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Package: 42-pin, 600-mil DIP

AIC15

Contextual Info: CMOS 32M 2M x 16 MROM FEATURES PIN CONNECTIONS • 2,097,152 words x 16 bit organization 42-PIN DIP TOP VIEW • Access time: 120 ns (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Package: 42-pin, 600-mil DIP

4039A

Contextual Info: CMOS 2M 128K x 16 MROM FEATURES • 131,072 words x 16 bit organization • Access time: 100 ns (MAX.) PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TO P VIEW s • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Power consumption: