D33A Search Results

EME-R3AA

Abstract: EME-D33A 48VDC inductive relays inductive load relays 48VDC 2.2k 5011642801-CIE1 CIE1
Contextual Info: 2006-10-18 5011642801-CIE1 Extension Card Instruction Sheet for EME-D33A, EME-R2CA and EME-R3AA Please thoroughly read this instruction sheet before installing option cards and putting them into use. The content of this instruction sheet may be revised without prior notice. Please consult our distributors or

glass fuse color code

Abstract: t fuse adapter royal fuse 2D16SB 63D33SB CEE-16 fuse class GG D33B gG fuse type TO IEC 269 30D16FB
Contextual Info: PREVIOUS HOME NEXT FIND IT DIAZED BOTTLE Diazed Fuses, commonly called "Bottle" Fuses, are available in five sizes, ND to 35 Amps, DII to 35 Amps, DIII to 100 Amps, DIV to 100 Amps and DV to 200 Amps. Fuse accessories are sized to match. Each size fuse body has a

siemens diazed gg

Abstract: fuse base IEC 269 glass fuse color code DIAZED AM 25A green color glass fuse glass fuse markings royal fuse Neozed fuses SIEMENS NH FUSE Neozed
Contextual Info: NEXT FIND IT TABLE OF CONTENTS MINIATURE DIAZED Mini fuses in five sizes to 20 Amps. • Slow Blow • Medium Blow Click for PDF file • Fast Blow • Super Fast Blow NEOZED CYLINDER NH "Bottle" fuses in five sizes to 200 Compact fuses in three sizes to Standard cylinder fuses are

MAX8774

Abstract: 88E1116 fic motherboard 42HG NF-430-N-A3 Maxim MAX8774 transistor c117 XTB70 NF-SPP-100-N-A2 ss14 dc
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.3 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

NF-SPP-100-N-A2

Abstract: 88E1116 NF-430-N-A3 88E1116 RGMII config SC413TSTRT Maxim MAX8774 APM2307AC-TRL MCP51 HY5PS561621AFP-25 M38827
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.5 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

diode in40

Abstract: Diode Mark ON B14 Q127 xn13
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767  Total Available Memory = 5,242,880 bits

D35B 60

Abstract: D35B D35B 60 74 D35B 80 D35B 60 89 D11A D12A LH5420 LH543601 LH543611
Contextual Info: LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

D35B

Abstract: D35B 60 D11A D12A D15A D18A LH5420 LH543601 D-33A
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

D35B

Abstract: D10A D11A D12A D15A LH5420 LH543601 D23B
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

A42 BF 331

Contextual Info: 12345634789A6BC 1DE48F75ECF34E87C2345C7D5E C9AA2 E 3F374C2!CC9"C#$%& 'EF34EC C12B96C2!C#$%#  F3 !" FB5#1333B9D7$936B62 'B 2AB9 3 !" 3

tda ic

Contextual Info: QS725420A PRELIMINARY High-Speed CMOS 256 x 36 x 2 Bi-directional FIFO ô QS725420A FEATURES/BENEFITS • Fast cycle tim es: 20/25/30/35 ns • T w o 256 x 36-bit FIFO buffers • Full 36-bit word width • Selectable 36/18/9-bit word width on port B • Fully asynchronous operation of port A and port B

L2735

Abstract: D-34A i-box
Contextual Info: LH543611/21 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

XN07

Abstract: Q127 wd2m
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767 ⎯ Total Available Memory = 5,242,880 bits

EPCS64SI16N

Abstract: tyco connectors MBRS360T3G d507 8C735 u708 C734 g23 c723 U707 EP2SGX30CF780C5N
Contextual Info: 8 6 7 1 2 3 4 5 REVISIONS REV PARALLEL I/O DESCRIPTION DATE APPROVED CONNECTIONS +VADJ OPTIONAL +VADJ C DIFFIO_TX0P DIFFIO_RX1N DIFFIO_TX1N DIFFIO_RX1P DIFFIO_TX1P DIFFIO_RX2N DIFFIO_TX2N DIFFIO_RX2P DIFFIO_TX2P DIFFIO_RX3N DIFFIO_TX3N DIFFIO_RX3P DIFFIO_TX3P

R5F35MCEJFF

Abstract: dvr rxd4 D35Ah d26bh R5F35M2E D34Ah d717* transistor D425 555 timer 20 khz square wave generator d688
Contextual Info: Datasheet M16C/5M Group, M16C/57 Group RENESAS MCU 1. REJ03B0267-0101 Rev.1.01 Jul 23, 2010 Overview 1.1 Features The M16C/5M and M16C/57 Group’s microcomputers MCUs are single-chip control units that utilize high-performance silicon gate CMOS technology with the M16C/60 Series CPU core. The M16C/5M

E99A

Abstract: D79f ED89 E17A ST E954 d697 marking d1f3 111rr011 EE5555 D685 97
Contextual Info: Reference Manual A G R E E M E N T CPU12 N O N - D I S C L O S U R E HC12 R E Q U I R E D Order this document by CPU12RM/AD Rev. 1.0 R E Q U I R E D A G R E E M E N T N O N - D I S C L O S U R E Motorola reserves the right to make changes without further notice to

NF-SPP-100-N-A2

Abstract: XTB70 smd transistor g11 PMU08A foxconn smd transistor F21 rqa130n03 G1 sot-23 AE91 Socket AM2
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.2 XTB70 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

88E1116

Abstract: Maxim MAX8774 NF-SPP-100-N-A2 NF-430-N-A3 Marvell 88E1116 MAX8774 transistor SMD DK QB smd diode U12 C647 C886 2A SP8K10
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.5 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

top mark smd A12 5PIN

Abstract: TRANSISTOR SMD CODE PACKAGE SOT89 52 10A transistor npn c882 zener diode c531 FAIRCHILD AA32 smd diode zener DIODE D49 ALPHA&OMEGA DATE CODE U261 intel g31 motherboard CN17-4
Contextual Info: 5 3 2 1 First International Computer,Inc Portable Computer Group HW Department D C 4 Board name : Mother Board Schematic 1. Schematic Page Description : Project : DPUA 2. PCI & IRQ & DMA Description : Version : 0.3 3. Block Diagram : D C 4. Nat name Description :

NF-SPP-100-N-A2

Abstract: 88E1116 XTB70 smd transistor G18 Maxim MAX8774 smd transistor ab2 SMD transistor k23 YL2 sot23 smd transistor w21 sot-23 foxconn
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.2 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

Marvell 88E1116

Abstract: Maxim MAX8774 88E1116 w32 smd transistor 143 NF-SPP-100-N-A2 A546 AU63 MAX8774 Alcor AU6366 SOT W18
Contextual Info: 5 4 3 2 1 First International Computer,Inc D D Portable Computer Group HW Department Board name : MotherBoard Schematic C Project : AMD S1 + Nvidia C51D + MCP51 Version : 0.6 C Initial Date : 05/13/2006 Confidential B B Manager Sign by : Avery Lee Drawing by

Contextual Info: 1234567894ABCDEF69 1234567894ABCDEF69 12345 26789ABCADE  4C45E57457DC7  234C25D C4E4E  ! " #F5$% 9 &552'  17E 4C3 F %6 3*A48+  7CD45,4DCCBC5!4B4F565  A7#, 7-C24  #2734544 2B2C2.4 D3

d19b

Contextual Info: QS723611, QS723621 PRELIMINARY Q High-Speed CMOS 5 1 2 X 3 6 X 2 /1 K X 3 6 X 2 Bi-directional FIFO QS723611 QS723621 FEATURES/BENEFITS DESCRIPTION • Fast cycle times: 20/25/30 ns 50/40/33 MHz • Functionally Upwards-Compatible with QS725420A • Two 512 x 36-bit (QS723611) or 1K x 36-bit

DL2AD

Contextual Info: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns The LH543601 contains two FIFO1buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and