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Contextual Info: Integrated Device Technology, Inc. 12-BIT CMOS MICROPROGRAM SEQUENCER FEATURES: • Low-power CMOS — Icc max. Military: 90mA Commercial: 75mA • Fast — IDT39C10B matches 2910A speeds — IDT39C10C 30% speed upgrade • 33-Deep stack — Accom modates highly nested loops and subroutines
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12-bitidt39c10bidt39c10c33-deep+440-pin44-pinmil-std-883idt39c10
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Intel 8008
Abstract: 8008 intel microprocessor pin diagram intel 8008 cpu 8008-1 MCS-8 8008 Intel 8008 CPU
Contextual Info: in te l 8008/8008-1 8-BIT MICROPROCESSOR • Instruction Qycle Time — 1.25 ^s with 8008-1 or^ 6 [is with 8008 ■ 48 Instructions, Data Oriented ■ Address Stack Contains 8 14-Bit Registers including Program Counter Which Permit Nesting of Subroutines
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14-bitintel 80088008 intel microprocessor pin diagramintel 8008 cpu+48008-1mcs-88008 intel8008 cpu
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MPY16U
Abstract: 8 bit multiplier with shift register mpy16s MPY16 m16u2 MC8U
Contextual Info: Multiply and Divide Routines Features Introduction • • • • • This application note lists subroutines for multiplication and division of 8- and 16bit signed and unsigned numbers. A listing of all implementations with key performance specifications is given in
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16bit16-bit11/00/xmmpy16u+58 bit multiplier with shift registermpy16smpy16m16u2mc8u
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AVR200
Abstract: avr200b div16u MPY16U 0936a
Contextual Info: AVR200: Multiply and Divide Routines Features Introduction • • • • • This application note lists subroutines for multiplication and division of 8 and 16-bit signed and unsigned numbers. A listing of all implementations with key performance specifications is given in Table 1.
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avr20016-bitdres16sdrem16s+9div16sdrem16sldrem16shdd16sldres16slavr200bdiv16umpy16u0936a
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9406A
Contextual Info: 9406 PROGRAM STACK FAIRCHILD TTL MACROLOGIC DESCRIPTIO N — The 9406 is a 16-word by 4 -b it "push-down po p-up" Program Stack. It is designed to im plem ent Program C ounter PC and return address storage fo r nested subroutines in programmable digital systems. The 9406 executes 4 instructions: Return,
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IR21
Abstract: IR30 M6805 M68HC08 68HC05 AN1219
Contextual Info: Order this document by AN1219/D Rev. 1.0 Freescale Semiconductor AN1219 Freescale Semiconductor, Inc. M68HC08 Integer Math Routines By Mark Johnson CSIC Applications Engineering Austin, Texas Introduction This application note discusses six integer math subroutines 1 that take
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an1219/dan1219m68hc0868hc08+468hc05ir21ir30m6805
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SN74154
Abstract: SN7442 SN54154 SN5442 SN5488A SN7448A SN7488A L 9236 truth table for 4 to 16 decoder SN5488
Contextual Info: TTL MSI CIRCUIT TYPES SN5488A. SN7488A 256-BIT READ-ONLY MEMORIES N D U A L -IN -L IN E PA CK AG E TOP V IE W 3 oo n mC -o r - 5 !" 1 -2 BINARY SELECT Applications in Computer Subroutines ENABLE/ G Useful in Display Systems and Readouts 16 15 >m Ç OUTPUT
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sn5488asn7488a256-bitsn74154+7sn7442sn54154sn5442sn7448al 9236truth table for 4 to 16 decodersn5488
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AKT01
Abstract: Decimal Integer Output Subroutines MSP430 General Purpose Subroutines MSP430 T001 T010 T011 T101 T110 CNV04
Contextual Info: Chapter 5 Software Applications Topic Page 5.1 Integer Calculation Subroutines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.2 Table Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32
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16-bit32-bit40-bitbin16+1208000h07fffhakt01decimal integer output subroutinesmsp430 general purpose subroutinesmsp430t001t010t011t101t110cnv04
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306667
Abstract: MSP430 msp430 RS232
Contextual Info: The USART Module 6.9.3 Software Routines The following sections show proven software routines, subroutines, and software MACROs for the UART mode of the USART. NOTES The program sequence for the initialization of the UART is important. As long as the SWRST bit
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MPY16S
Abstract: AVR200 avr200b avr200.asm 0936B MPY16U DIV16S
Contextual Info: AVR200: Multiply and Divide Routines Features Introduction • • • • • This application note lists subroutines for multiplication and division of 8 and 16-bit signed and unsigned numbers. A listing of all implementations with key performance specifications is given in Table 1.
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avr20016-bitdres16sdrem16s+10div16sdrem16sldrem16shdd16sldres16slmpy16savr200bavr200.asm0936bmpy16u
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16F84 sample programs pic basic
Abstract: 16F84 LED ON OFF pic16f84 tutorial 16F84 LED ON OFF code pic 16f84 FLASHING OF 8 LEDs using 16F84 pic basic examples PIC16F84 example codes pic program 16F84
Contextual Info: PIC16F84 tutorial Contents 1.Good Programming Techniques. 2. The Registers. 3. Writing To the Ports. 4. Delay Loops. 5. Subroutines 6. Reading from the I/O ports. 7. Efficient memory usage 8. Logical And Arithmetic Operators 9. BIT Operations 10. Data Tables
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pic16f8416f84 sample programs pic basic16f84 led on offpic16f84 tutorial+716f84 led on off codepic 16f84flashing of 8 leds using 16f84pic basic examplespic16f84 example codespic program16f84
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ADMC331
Abstract: ADSP-2100 ADSP-2171 AN331-03 8 bit square root
Contextual Info: a Basic Mathematical Subroutines for the ADMC331 AN331-09 a Basic Mathematical Subroutines for the ADMC331 AN331-09 Analog Devices Inc., January 2000 Page 1 of 16 a Basic Mathematical Subroutines for the ADMC331 AN331-09 Table of Contents SUMMARY. 3
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admc331an331-09dmc331log10+4adsp-2100adsp-2171an331-038 bit square root
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Contextual Info: Locating Subroutines in Program Memory Bank3 in the HT56R26 Locating Subroutines in Program Memory Bank3 in the HT56R26 D/N:HA0218E Introduction The HT56R26 includes 32K x 16 bits of OTP Program Memory, divided into four Banks labeled Bank0, Bank1, Bank2 and Bank3. The following depicts the way to execute
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200B
Abstract: AN581 PIC16C54 PIC16C55 PIC16C56 PIC16C57 PIC16C5X
Contextual Info: Implementing Long Calls AN581 Implementing Long Calls Since A8 is forced to 0 by CALL instructions, the start address of subroutines must be in the first 256 words of each program memory page. Depending on the size and number of called subroutines, this limitation may become a burden to the software developer. The implementation of a “long call” eases this, by allowing the
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binary to bcd msp430
Abstract: using the msp430 as a real-time clock MSP430 General Purpose Subroutines MSP430
Contextual Info: MSP430 Family General Purpose Subroutines TOPICS 5 General Purpose Subroutines 5-3 5.1 Saving Power Consumption 5-3 5.2 Calculated Branch 5-4 5.3 Binary to BCD 5-6 5.4 BCD to Binary 5-7 5.5 Bubble Sort 5-8 5.6 Table Search 5.7 Parity 5-10 5.8 Realtime Clock with 8 bit Timer
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msp430binary to bcd msp430using the msp430 as a real-time clockmsp430 general purpose subroutines |
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Trigonometric
Abstract: precision Sine Wave Generator core i5 registers ADMC331 ADSP-2100 ADSP-2171 AN331-03 arctangent
Contextual Info: a Basic trigonometric subroutines for the ADMC331 AN331-10 a Basic trigonometric subroutines for the ADMC331 AN331-10 Analog Devices Inc., January 2000 Page 1 of 11 a Basic trigonometric subroutines for the ADMC331 AN331-10 Table of Contents SUMMARY. 3
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admc331an331-10trigonometricprecision sine wave generator+5core i5 registersadsp-2100adsp-2171an331-03arctangent
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ADMC300
Abstract: ADSP-2100 ADSP-2171 AN300-03 AN300-10
Contextual Info: a Basic Mathematical Subroutines for the ADMC300 AN300-09 a Basic Mathematical Subroutines for the ADMC300 AN300-09 Analog Devices Inc., January 2000 Page 1 of 16 a Basic Mathematical Subroutines for the ADMC300 AN300-09 Table of Contents SUMMARY. 3
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ScansUX1004
Contextual Info: 9406 PROGRAM STACK F A IR C H IL D TTL MACROLOGIC DESC R IPTIO N — The 9406 is a 16-word by 4 -b it "push-dow n po p -u p " Program Stack. It is designed to im plem ent Program C ounter PC and return address storage fo r nested subroutines in programmable digital systems. The 9406 executes 4 instructions: Return,
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16-wordscansux1004 |
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Fairchild 958 counter
Abstract: ScansUX1003
Contextual Info: 4706/4706B PROGRAM STACK FAIRCHILD CMOS MACROLOGIC D E S C R IP T IO N — Th e 4 7 0 6 is a 16-w ord by 4 -b it "push-down p o p-up" Program Stack. It is designed to im plem ent Program C oun ter PC and return address storage fo r nested subroutines in program m able digital systems. Th e 4 7 0 6 executes 4 instructions: R eturn,
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4706/4706b16-wordfairchild 958 counterscansux1003 |
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8086 assembly language reference manual
Abstract: intel 8086 intel 486
Contextual Info: Procedure Calls, Interrupts, and Exceptions 28 This chapter describes the facilities in the Intel Architecture for executing calls to procedures or subroutines. It also describes how interrupts and exceptions are handled from the perspective of an application programmer.
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Mul16
Abstract: AN958 APP958 MAX7651 MAX7652 SUB32 8051 microcontroller application
Contextual Info: Maxim > App Notes > MICROCONTROLLERS Keywords: RAM, Internal memory, MCU, Microcontroller, microprocessor, uC, binary arithmetic, binary math, booth's algorithm, multiply, divide, ASCII Feb 04, 2002 APPLICATION NOTE 958 A Collection of Extended Math Subroutines for the MAX7651
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max765132-bit16x168051-compatible+8max765212-bitcom/an958mul16an958app958sub328051 microcontroller application
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dm 136
Abstract: sonar beamforming DM 024 IQ vector generator MHZ ci 555 speech scrambler NE 555 datasheet Delay linear sweep generator using IC 555 adaptive delta modulation demodulation LMS adaptive filter
Contextual Info: 2 Modems 2.5 ADAPTIVE EQUALIZATION This section presents subroutines for an ADSP-2100 family implementation of an adaptive channel equalizer for a high speed modem. The CCITT’s V.32 recommendation for a 9600 bps modem specifies the use of this type of equalizer in the receiver section.
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adsp-2100com-24com-36com-25+10dm 136sonar beamformingdm 024iq vector generator mhzci 555speech scramblerne 555 datasheetdelay linear sweep generator using ic 555adaptive delta modulation demodulationlms adaptive filter
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HT56R678
Abstract: emfi
Contextual Info: HT56R6x/6xx How to Write the Multi-Function Interrupt Service Routine HT56R6x/6xx How to Write the Multi-Function Interrupt Service Routine D/N:HA0186E Introduction The HT56R6x/6xx TinyPower series MCUs include Multi-Function Interrupts. The following will show the way to write Multi-Function subroutines.
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zener spice model
Abstract: Intusoft spice
Contextual Info: t eArHaDcLt B i va see dS oPnI C NI n ew ‘ CE’ Introduction Intusoft, makers of the ISSPICE simulator, have found a new way to extend the capabilities of SPICE by allowing engineers to easily add user defined models based on C code subroutines. SPICE based simulators have progressed towards a viable AHDL dramatically
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