NAND 12 INPUTS Search Results

74LV10

Abstract: 74LV10PW
Contextual Info: INTEGRATED CIRCUITS 74LV10 Triple 3-input NAND gate Product specification Supersedes data of 1997 Feb 12 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION

Contextual Info: Order this data sheet by MC74AC20/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74AC20 M C74ACT20 Dual 4-Input NAND G ate • Outputs Source/Sink 24mA • ’ACT20 Has TTL Compatible Inputs DUAL 4-INPUT NAND GATE VCC A1 B1 NC C1 14 13 12 11 10 D1 01 8 8 | 99 A

SOT996-2

Abstract: 74AHC2G00 74AHC2G00DC 74AHC2G00DP 74AHCT2G00 74AHCT2G00DC 74AHCT2G00DP JESD22-A114E
Contextual Info: 74AHC2G00; 74AHCT2G00 Dual 2-input NAND gate Rev. 02 — 12 January 2009 Product data sheet 1. General description The 74AHC2G00; 74AHCT2G00 is a high-speed Si-gate CMOS device. The 74AHC2G00; 74AHCT2G00 provides two 2-input NAND gates. 2. Features • Symmetrical output impedance

act00 motorola

Abstract: 74AC MC74AC00 MC74ACT00
Contextual Info: MC74AC00 MC74ACT00 Quad 2ĆInput NAND Gate QUAD 2-INPUT NAND GATE • Outputs Source/Sink 24 mA • ′ACT00 Has TTL Compatible Inputs VCC 14 13 12 11 10 9 8 N SUFFIX CASE 646-06 PLASTIC 1 2 3 4 5 6 7 GND D SUFFIX CASE 751A-03 PLASTIC MAXIMUM RATINGS* Symbol

74AC

Abstract: MC74AC10 MC74ACT10
Contextual Info: MC74AC10 MC74ACT10 Triple 3ĆInput NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 N SUFFIX CASE 646-06 PLASTIC 1 2 3 4 5 6 7 GND D SUFFIX CASE 751A-03 PLASTIC MAXIMUM RATINGS*

"USB" peripheral

Abstract: CY7C64013
Contextual Info: faxi id: 3407 CY7C64011/12/13 CY7C64111/12/13 High Speed USB 12 Mbps Peripheral Controller 1.0 Additional I/O pins with programmable current sink outputs Features • Low -costsolutionforhigh-speed USB peripheral appli­ cations (printers, modems, nand-held scanners, etc.)

HEF4093BP

Abstract: HEF4093BT NXP HEF4093BT MO-001 HEF4093B JESD22-A114E
Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 04 — 12 June 2008 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

74LS10 pin configuration

Contextual Info: GD54/74LS10 TRIPLE 3-INPUT POSITIVE NAND GATES Description Pin Configuration This device contains three independent 3-input NAND gates. It performs the Boolean functions Y = A B C or Y = Â + B + Ü in positive logic. Vcc 1C 1Y 3C 3B 3A 3Y 14 13 12 11 10 9

74LS00 clock frequency

Abstract: 74LS00 function table pin configuration 74LS00
Contextual Info: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. K performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 14 13 12 11 10 9 3Y 8 lIoJ lioJ

Contextual Info: SN74LVC10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284K – JANUARY 1993 – REVISED SEPTEMBER 2002 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3C 3B 3A 3Y RGY PACKAGE TOP VIEW description/ordering information This triple 3-input positive-NAND gate is designed

Contextual Info: SN74LVC10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284K – JANUARY 1993 – REVISED SEPTEMBER 2002 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3C 3B 3A 3Y RGY PACKAGE TOP VIEW description/ordering information This triple 3-input positive-NAND gate is designed

Contextual Info: MITSUB IS HI -CD6TL LOGIC} Il 91D D È I bSMTflS? ODlBEhñ □ 12 2 6 8 D >00^ ?^ u MITSUBISHI ASTTLs M 74AS1804P ~ 7^Y3'/S HEX 2-IN PU T NAND DRIVER DESCRIPTION The M74AS1804P is a semiconductor integrated circuit consisting of six 2-input positive-logic NAND buffer

A115-A

Abstract: SN74LVC10A SN74LVC10AD SN74LVC10ADR SN74LVC10ARGYR
Contextual Info: SN74LVC10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284L – JANUARY 1993 – REVISED MAY 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3C 3B 3A 3Y RGY PACKAGE TOP VIEW description/ordering information This triple 3-input positive-NAND gate is designed

Contextual Info: SN74LVC10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284M – JANUARY 1993 – REVISED JULY 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3C 3B 3A 3Y RGY PACKAGE TOP VIEW description/ordering information This triple 3-input positive-NAND gate is designed

G25Q

Abstract: B-6094
Contextual Info: S E M IC O N D U C T O R tm DM74S10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Connection Diagram Dual-ln-Line Package Vcc C1 Y1 13 I» C3 12 — B3 11 A3 10 Y3

W16B

Contextual Info: S E M IC O N D U C T O R tm DM74S40 Dual 4-Input NAND Buffers General Description This device contains two independent gates each of which performs the logic NAND function. Connection Diagram Dual-ln-Line Package V „ 02 C2 i.i NC 12 B2 A2 Ÿ2 ! 10 |ll 8

Contextual Info: S E M IC O N D U C T O R tm DM74S20 Dual 4-Input NAND Gates General Description This device contains two independent gates each of which performs the logic NAND function. Connection Diagram Dual-ln-Line Package V rC 02 C2 13 I . NC 12 B2 |l1 A2 Y2 9 10 8 L-k

751A-02

Contextual Info: SN54/74LS26 QUAD 2-INPUT NAND BUFFER • ESD > 3500 Volts QUAD 2-INPUT NAND BUFFER LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 * * * 1 2 8 J SUFFIX CERAMIC CASE 632-08 * 3 4 5 6 7 14 1 GND * OPEN COLLECTOR OUTPUTS N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX

ttl 74ls10

Abstract: truth table NOT gate 74 74LS10 74LS10 truth table 751A-02 SN54-74LS10 74LS10 TTL 3 input nand gate 74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

4 inputs OR gate truth table

Abstract: 74LS20 TTL 74ls20 truth table NAND gate 74 74Ls20 truth table 751A-02 4 inputs OR gate datasheet truth table NOT gate 74 74LS20 2 input SN74LSXXN
Contextual Info: SN54/74LS20 DUAL 4-INPUT NAND GATE DUAL 4-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

751A-02

Abstract: TTL 74ls30 FAST AND LS TTL motorola ceramic dual in-line case 74ls30 datasheet
Contextual Info: SN54/74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD

Contextual Info: S E M IC O N D U C T O R tm DM74S20 Dual 4-Input NAND Gates General Description This device contains tw o independent gates each of which perform s the logic NAND function. Connection Diagram Dual-ln-Line Package V rC 02 C2 13 I . NC 12 B2 |l1 A2 10 Y2 9 8

truth table NAND gate 74

Abstract: 751A-02
Contextual Info: SN54/74LS01 QUAD 2-INPUT NAND GATE • ESD > 3500 Volts QUAD 2-INPUT NAND GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 * 8 * * 1 9 * 2 3 4 J SUFFIX CERAMIC CASE 632-08 5 6 7 14 1 GND * OPEN COLLECTOR OUTPUTS N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC

74LS40

Abstract: truth table NOT gate 74 751A-02 SN54LSXXJ SN74LSXXN SN74LSXXD
Contextual Info: SN54/74LS40 DUAL 4-INPUT NAND BUFFER DUAL 4-INPUT NAND BUFFER VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN