ACT10 Search Results

Contextual Info: Technical Data CD54/74AC109, CD54/74AC112 CD54/ACT109, CD54/74ACT112 Tf x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC H S282 IS- » 2 1JÎK IC f*ÎR • 3 4 1 1 • IO Dual “J-K” Flip-Flop with Set and Reset F /F 1 CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

transistor AC126

Abstract: equivalent transistor ac125 AC393 AC126 74AC393 AC365 AC682 d flip flop p6nk60z ACT03
Contextual Info: HC Portfolio Comparison PART # AC00 ACT00 AC01 AC02 ACT02 AC03 ACT03 AC04 ACT04 ACU04 AC05 ACT05 AC07 AC08 ACT08 AC09 AC10 ACT10 AC11 ACT11 AC14 ACT14 AC20 ACT20 AC32 ACT32 AC74 ACT74 AC86 ACT86 AC107 AC109 ACT109 AC112 ACT112 AC123 AC125 ACT125 AC126 ACT126

74AC109

Abstract: 74AC109PC 74AC109SC 74AC109SJ 74ACT109 74ACT109PC 74ACT109SC
Contextual Info: Revised November 1999 74AC109 • ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

S35R2

Abstract: 1278n 74aC-aCT109 CD541 j8332 RCA
Contextual Info: HARRIS SEMICOND SECTOR 37E D • 4302271 D025411 6 *HAS _ Technical Data CD54/74AC109, CD54/74AC112 CD54/ACT109, CD54/74ACT112 Advanced Information 07 Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

FN 1016

Abstract: AC1016 JIS D 5403 101655 MPY016H 1016-80 ACT1016 FA 5404 itt 5408 application
Contextual Info: AC1016 • ACT1016 5 4 A C /7 4 A C 1 0 1 6 • 5 4 A C T /7 4 A C T 1 0 1 6 16 x 16 Parallel Multiplier Description Connection Diagrams The ’AC/ACT1016 is a high-speed, low power 16 x 16-bit parallel m u ltip lie r that is ideally suited fo r real-tim e d ig ita l signal processing applications.

Contextual Info: 43G2271 D G 2 S 4 H 37E D HARRIS SEMICOND SECTOR _ ñ *HAS Technical Data CD54/74AC109, CD54/74AC112 CD54/ACT109, CD54/74ACT112 Advanced Information T^fc-or?- 0 7 Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

Contextual Info: AC1017 • ACT1017 54AC/74AC1017 • 54ACT/ACT1017 16 x 16 Parallel Multiplier Description Connection Diagram The 'AC/’ACT1017 is a high-speed, low power 16 x 16-bit parallel multiplier that is ideally suited for real-time digital signal processing applications.

SC-43A

Contextual Info: TO - 92 ACT108-600D AC Thyristor power switch Rev. 02 — 27 December 2010 Product data sheet 1. Product profile 1.1 General description AC Thyristor power switch in a SOT54 plastic package with self-protective capabilities against low and high energy transients

Contextual Info: s e m ic o n d u c t o r Revised November 1999 74AC109 • ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two_ high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

Contextual Info: AC109 • ACT109 54AC/74AC109 • 54ACT/ACT109 Dual JK Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flipflops. The clocking operation is independent of

74AC109MTC

Abstract: 74AC109 74AC109PC 74AC109SC 74AC109SJ 74ACT109 74ACT109SC
Contextual Info: Revised August 2000 74AC109 • ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

74AC109

Abstract: 74AC109MTC 74ACT109 74AC109SC 74AC109SJ 74ACT109PC 74ACT109SC
Contextual Info: 74AC109, ACT109 Dual JK Positive Edge-Triggered Flip-Flop tm Features General Description • ICC reduced by 50% The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the

74AC10

Abstract: 74AC 74AC10MTC 74AC10PC 74AC10SC 74AC10SJ 74ACT10 74ACT10PC 74ACT10SC
Contextual Info: Revised February 2005 74AC10 • ACT10 Triple 3-Input NAND Gate General Description Features The AC/ACT10 contains three, 3-input NAND gates. • ICC reduced by 50% on 74AC only ■ Outputs source/sink 24 mA Ordering Code: Order Number Package Number 74AC10SC

Contextual Info: Technical Data „ , CD54/74AC109, CD54/74AC112 CD54/ACT109, CD54/74ACT112 Advanced Information Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K CD54/74AC/ACT112 - Negative-Edge-Triggered (J, K) Type Features:

sop65p640

Abstract: SOP65
Contextual Info: 74AC10, ACT10 Triple 3-Input NAND Gate Features General Description • ICC reduced by 50% on 74AC only The AC/ACT10 contains three, 3-input NAND gates. ■ Outputs source/sink 24mA Ordering Information Order Number Package Number 74AC10SC 74AC10SJ 74AC10MTC

Contextual Info: M MOTOROLA M C 74A C 10 M C 74A C T 10 T rip le 3 -In p u t N A N D G ate TRIPLE 3 -IN P U T N A N D G ATE • Outputs Source/Sink 24 mA • 'ACT10 Has TTL Compatible Inputs N SUFFIX CASE 646-06 PLASTIC 1 D SUFFIX CASE 751A-02 PLASTIC M A X IM U M R A T IN G S *

ACT108-600E

Abstract: SC-43A
Contextual Info: ACT108-600E AC Thyristor power switch Rev. 02 — 21 October 2009 Product data sheet 1. Product profile 1.1 General description AC Thyristor power switch in a SOT54 plastic package with self-protective capabilities against low and high energy transients 1.2 Features and benefits

Contextual Info: Revised October 1998 j,f > i '' ^ : 3? •? » 74AC10 • ACT10 Triple 3-Input NAND Gate General Description Features The AC/ACT10 contains three, 3-input NAND gates. ■ lc c reduced by 50% on 74AC only ■ Outputs source/sink 24 mA Ordering Code: Order Number

Contextual Info: AC1010 • ACT1010 54AC/74 AC 1010 • 54ACT/ACT1010 16 x 16 Parallel Multiplier/Accumulator Description Connection Diagrams The ’AC/’ACT1010 is a high-speed, low-power 16 x 16 bit parallel m ultiplier with a 35-bit accumulator that is ideally suited for real-time

54ACT109

Abstract: 54ACT109DMQB 54ACT109FMQB 54ACT109LMQB ACT74 J109
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/02/96 Last Update Date: 03/17/97 Last Major Revision Date: 02/05/97 ACT109-X REV 2A0 Dual JK Positive Edge-Triggered Flip-Flop General Description The ACT109 consists of two high-speed completely independent transition clocked

74AC

Abstract: 74AC10 74AC10MTC 74AC10PC 74AC10SC 74AC10SJ 74ACT10 74ACT10PC 74ACT10SC
Contextual Info: Revised January 2000 74AC10 • ACT10 Triple 3-Input NAND Gate General Description Features The AC/ACT10 contains three, 3-input NAND gates. • ICC reduced by 50% on 74AC only ■ Outputs source/sink 24 mA Ordering Code: Order Number Package Number Package Description

Contextual Info: ACT108W-600E AC Thyristor power switch Rev. 01 — 29 April 2009 Product data sheet 1. Product profile 1.1 General description AC Thyristor power switch in a SOT223 surface-mountable plastic package 1.2 Features and benefits „ Common terminal on mounting base

74AC109SC

Abstract: 74AC109 74AC109PC 74AC109SJ 74ACT109 74ACT109PC 74ACT109SC
Contextual Info: Revised October 1998 74AC109 • ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to CD Clear sets Q to LOW level The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking

Contextual Info: M MOTOROLA MC74AC10 ACT10 Product Preview T rip le 3 -In p u t N A N D G ate TRIPLE 3-INPUT NAND GATE • O u tp u ts Source/S ink 24 m A • 'ACT10 Has TTL C o m p a tib le Inputs N SUFFIX CASE 646*06 PLASTIC i D SUFFIX CASE 751A-02 PLASTIC DC CHARACTERISTICS