74AC109 Search Results

Contextual Info: Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Tf x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC H S282 IS- » 2 1JÎK IC f*ÎR • 3 4 1 1 • IO Dual “J-K” Flip-Flop with Set and Reset F /F 1 CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

74AC109

Abstract: 74AC109PC 74AC109SC 74AC109SJ 74ACT109 74ACT109PC 74ACT109SC
Contextual Info: Revised November 1999 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

S35R2

Abstract: 1278n 74aC-aCT109 CD541 j8332 RCA
Contextual Info: HARRIS SEMICOND SECTOR 37E D • 4302271 D025411 6 *HAS _ Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Advanced Information 07 Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

74AC109

Abstract: 74AC109PC 74AC109SC 74AC109SJ 74ACT109 M16A M16D
Contextual Info: S H IU D Revised O ctober 1998 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description LO W input to Cp Clear sets Q to LOW level T h e AC /AC T109 consists of two_ high-speed com pletely independent transition clocked JK flip-flops. The clocking

Contextual Info: 43G2271 D G 2 S 4 H 37E D HARRIS SEMICOND SECTOR _ ñ *HAS Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Advanced Information T^fc-or?- 0 7 Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

Contextual Info: s e m ic o n d u c t o r Revised November 1999 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two_ high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

Contextual Info: AC109 • ACT109 54AC/74AC109 • 54ACT/74ACT109 Dual JK Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flipflops. The clocking operation is independent of

615162

Contextual Info: NATIONAL SEMICOND L06IC blE b 5 D 1 1 2 2 00747flb bTb « N S C 1 J> T - H L 'O T - 0 7 03 National ÆM Semiconductor 54AC/74AC109 • 54ACT/74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’AC /’ACT109 consists of two high-speed completely

74AC109MTC

Abstract: 74AC109 74AC109PC 74AC109SC 74AC109SJ 74ACT109 74ACT109SC
Contextual Info: Revised August 2000 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

74AC109

Abstract: 74AC109MTC 74ACT109 74AC109SC 74AC109SJ 74ACT109PC 74ACT109SC
Contextual Info: 74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop tm Features General Description • ICC reduced by 50% The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the

Contextual Info: Technical Data „ , CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Advanced Information Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K CD54/74AC/ACT112 - Negative-Edge-Triggered (J, K) Type Features:

Contextual Info: Technical Data , CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Advanced Informaron Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K CD54/74AC/ACT112 - Negative-Edge-Triggered (J, K) Type Features: • Buffered inputs

ZD302

Contextual Info: 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to C q Clear sets Q to LOW level T h e AC /AC T109 consists of two_ high-speed com pletely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall tim es of th e clock

74AC109SC

Abstract: 74AC109 74AC109PC 74AC109SJ 74ACT109 74ACT109PC 74ACT109SC
Contextual Info: Revised October 1998 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to CD Clear sets Q to LOW level The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking

CD74ACT109E

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS282 This data sheet is applicable to the CD54/74AC109, CD54AC112, CD45ACT109, and CD54ACT112. See SCHS233 for information on the CD74AC112, CD74ACT109, and CD74ACT112. IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS282 This data sheet is applicable to the CD54/74AC109, CD54AC112, CD45ACT109, and CD54ACT112. See SCHS233 for information on the CD74AC112, CD74ACT109, and CD74ACT112. IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue

74AC

Abstract: AC109 ACT74 99231
Contextual Info: , February 1993 54AC/74AC109 • 54ACT/74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’A C /’AC T109 consists o f tw o high-speed com pletely independent transition clocked JK flip-flops. T he clocking operation is independent of rise and fa ll tim es o f the clock

rca 1967

Abstract: 74AC112
Contextual Info: Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 v Texas In s t r u m e n t s D ata sheet acquired from Harris Sem iconductor SC H S282 u- Dual “J-K” Flip-Flop with Set and Reset F /F 1 IC P - 2S — 3C P 13 ia CD54/74AC/ACT109 - Positive-Edge-Triggered J, K

Contextual Info: . February 1993 54AC/74AC109 • 54 ACT/74 ACT 109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’A C /’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

74AC109

Abstract: 74AC109PC 74AC109SC 74AC109SJ 74ACT109 M16A M16D
Contextual Info: Revised N ovem ber 1999 S E M IC O N D U C T O R T M 74AC109 • 74ACT109 Dual JK Positive Edge -Triggered Flip-Flop General Description Features The A C /AC T109 consists of two_ high-speed com pletely independent transition clocked JK flip-flops. The clocking

smd diode c524

Abstract: 89551 AC109 74AC ACT74 opo 7 cp
Contextual Info: , February 1993 54AC/74AC109 • 54ACT/74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’A C /’AC T109 consists o f tw o high-speed com pletely independent transition clocked JK flip-flops. T he clocking operation is independent of rise and fa ll tim es o f the clock

99231

Abstract: 89551 54ACT 74AC 74AC109 74ACT109 AC109 ACT74 C1995 EA25
Contextual Info: 54AC 74AC109  54ACT 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’AC ’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops The clocking operation is independent of rise and fall times of the clock

74ac109

Abstract: 74ac112
Contextual Info: Technical Data . CD54/74AC109, CD54/74AC112 CD54/74ACT109, CDS4/74ACT112 Advanced Intorniai,on U - î — Dual “J-K” Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered J, K CD54/74AC/ACT112- Negative-Edge-Triggered (J, K) 3 2S -

P1-12H

Abstract: P112H
Contextual Info: Technical Dala CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Advanced Information Dual “J-K” Flip-Flop with Set and Reset CD54/74A C/AC T109- Positive-Edge-Triggered J, K CD54/74AC/ACT 112 - Negative-Edge-Triggered (J, K) T y p e Features: