N74LS1 Search Results

sr flip flop

Abstract: DN74LS113 MA161
Contextual Info: N74LS113 LS TTL DN74LS Series D N 7 4 L S 1 1 3 ^ 7 ^ U S 3 Dual J-K Negative Edge-Triggered F lip -F lo p s with Set) • Description P-l D N74LS113 contains tw o negative-edge triggered J-K flip­ flop circuits, each w ith independent clock-CP, J, K, and

Contextual Info: 54/7412 54LS/74LS12 ORDERING CODE PACKAGES PIN C O N F. PIN CONFIGURATION See Section 9 for further Package and Ordering Information. C O M M ERCIAL R A N G ES =5V ±5%; T a =0“C to *70"C VC C Plastic D IP Fig. A N7412N • N74LS12N Ceramic D IP Fig. A

Contextual Info: LS TTL DN74LS Series N74LS109 D N 7 4 L S 1 0 9 Dual J-K Positive Edge-Triggered F lip-F lops with S et and Reset • Description P-2 D N74LS109 contains two positive-edge triggered J-K flipflop circuits, each w ith independent clock-CP, J, K, and direct-coupled set and reset input terminals.

ma161

Contextual Info: LS TTL DN74LS Series N74LS112 N74LS112 Dual J-K Negative Edge-Triggered F lip-F lops with S et and Reset • P-2 Description D N74LS112 contains two negative-edge triggered J-K flip­ flop circuits, each w ith independent clock-CP, J , K, and direct-coupled set and reset in p u t term inals.

DN74LS139

Abstract: SO-16D
Contextual Info: LS TTL DN74LS Series N74LS139 N74LS139 Kj 7 4 . ls Dual 2 - lin e to 4 - lin e D ecoders / D em ultiplexers • Description D N74LS139 contains two 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable in put term inals.

Contextual Info: I LS TTL DN74LS Series N74LS153 N74LS153 Dual 4 -lin e to 1 -lin e Data Selectors / Multiplexers • Description P-2 D N74LS153 contains tw o 4-line to 1-line data selector/ m ultiplexer circuits. ■ Features • • • • Independent enable input for each circuit

74L5

Contextual Info: 74LS197 Signetics Counter Presettable 4-Bit Binary Ripple Counter Product Specification Logic Products FEATURES TYPE PIN CONFIGURATION 16mA COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to + 70”C PACKAGES Plastic DIP N74LS197N Plastic SO-14 N74LS197D NOTE: For information regarding devices processed to Military Specifications, see the Signetics Military Products

400M

Abstract: DN74LS155 MA161
Contextual Info: LS TTL DN74LS Series D N 7 4 L S 1 5 5 i\j N74LS155 74- 15 5 Dual 2-line to 4-line Decoders/ Demultiplexers • Description P-2 D N74LS155 contains tw o 2-bit binary decoder/dem ultiplexer circuits. to quarternary ■ Features • • • • Low o u tp u t im pedance

DN74LS139

Contextual Info: LS TTL DN74LS Series N74LS139 N74LS139 Kj 7 4 . ls Dual 2 - lin e to 4 - lin e D ecoders / D em ultiplexers • Description D N74LS139 contains two 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable in put term inals.

DN74LS193

Contextual Info: ! N74LS193 LS T T L DN74LS Series D N 7 4 L S 1 9 3 Synchronous 4 - b it Binary U p /D o w n Dual Clock Counters with R eset P-2 • Description D N74LS193 is a synchronous hexadecim al (4-bit binary) up /d o w n co u n ter w ith direct-coupled reset in p u t and set

7412 pin configuration

Abstract: 74LS N7412F N7412N N74LS12F N74LS12N S5412F S5412W S54LS12F S54LS12W
Contextual Info: PIN CONFIGURATION 54/7412 54LS/74LS12 ORDERING CODE PACKAGES See Section 9 for further Package and Ordering Information. PIN C O N F. C O M M ER C IA L RANGES VCC = SV ± 5%; T a = 0“ C to *70"C P lastic DIP Fig. A N7412N • N74LS12N C era m ic DIP Fig. A

9013N

Contextual Info: I N74LS191 LS TTL DN74LS Series N74LS191 Synchronous 4 -b it Binary U p /D ow n Counters with U p /D ow n Mode Control • Description P -2 D N74LS191 is a synchronous 4-bit binary (hexadecim al) co u ter w ith u p /d o w n control inputs and set input.

DN74LS151

Abstract: MA161
Contextual Info: I N74LS151 LS TTL DN74LS Series N74LS151 8 -lin e to 1 -lin e Data • S e le c to r s / Multiplexers P-2 Description D N74LS151 is an 8-line to 1-line data selector/m ultiplexer. ■ Features • • • • Enable in p u t C om plem entary o u tp u ts

DN74LS138

Contextual Info: It LS TTL DN74LS Series D N 7 4 L S 1 3 N74LS138 8 3 -lin e to 8 -lin e Decoders/ Demultiplexers • Description P-2 D N74LS138 is a 3-bit decimal to octal decoder/demulti­ plexer with enable inputs. ■ Features • • Three types o f enable inputs Quaternary to hexadecimal decoder/demultiplexer capa­

74190

Abstract: 74LS191 pins ttl 74190 counter 74190 signetics 74190 74191 state diagram 74ls191 function table
Contextual Info: 74190, 191, LS191 Signetics Counters '190 Presettable BCD/Decade Up/Down Counter '191 Presettable 4-Bit Binary Up/Down Counter Product Specification Logic Products FEATURES • Synchronous, reversible counting • BCD/decade—'190 4-bit binary—'191 • Synchronous, reversible counting

TTL 74156

Abstract: demultiplexer 3 16 ttl 74156 C005970S
Contextual Info: 74156, LS156 Signetics Decoders/Demultiplexers Dual 2-Line To 4-Line Decoder/Demultiplexer Open Collector Product Specification Logic Products FEATURES • Common Address inputs • True or complement data demultiplexing • Dual 1-of-4 or 1-of-8 decoding

74LS181

Contextual Info: PIN CONFIGURATION SPEED/PACKAGE AVAILABILITY 54 F,W 74 A A,F,W PACKAGE LOGIC DIAGRAM •E H |V C C 'E e^enq; I odo[T I SWITCHING CHARACTERISTICS VCC = 5V. TA - 25° C TO OUTPUT tPLH 'PHL Low-to-high High-to-low Data £Even 40 45 60 68 tPLH »PHL Low-to-high

IC 74173

Abstract: ttl 74173 74173 ic ap 5331 8T10 74173 74173+truth+table
Contextual Info: Signelics 74173, LS173 Flip-Flops Quad D-Type Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES • Edge-triggered D-type register • Gated input enable for hold "do nothing" mode • 3-State output buffers • Gated output enable control

74LS169A

Abstract: 74LS168A 74S168A S168A 74S169
Contextual Info: 74LS168A, 74LS169A, S168A, S169A Signetics 4-Bit Bidirectional Counters 4-Bit Up/Down Synchronous Counter Product Specification Logic Products FEATURES • Synchronous counting and loading • Up/down counting • Modulo 16 binary counter — '169A • BCD decade counter — ' 168A

ic 74153 Multiplexer

Abstract: application of ic 74153 ic 74153 Multiplexer pin diagram pin DIAGRAM OF IC 74153 IC 74153 Multiplexer 74153 74153 multiplexer ic IC 74LS153 pin diagram ic pin configuration 74153 74153 equivalent
Contextual Info: 74153, LS153, S153 Signetics Multiplexers Dual 4-Line To 1-Line Multiplexer Product Specification Logic Products FEATURES • Non-inverting outputs • Separate enable for each section • Common select inputs • See '253 for 3-state version DESCRIPTION The '153 is a dual 4-input multiplexer

1 to 16 74154 demultiplexer

Abstract: 74LS154 decoder TTL 74154 circuit diagram of 74ls154 74ls154 pin configuration of 74LS154 decoder 74LS154 74154 demultiplexer max3633 pin diagram of 74ls154
Contextual Info: Signetics 74154, LSI54 Decoder/Demultiplexers 1-of-16 Decoder/Demultiplexer Product Specification Logic Products FEATURES • 16-line demultiplexing capability • Mutually exclusive outputs • 2-input enable gate for strobing or expansion TYPICAL SUPPLY CURRENT

74194 function table

Abstract: 74194 universal shift register TTL 74194 74194 design and application shift register 74194 circuit 74194 74194 shift register 74194 shift register waveform 74194 logic diagram N74S194N
Contextual Info: 74194, LS194A, S194 Signetics Shift Registers 4-Bit Bidirectional Universal Shift Register Product Specification Logic Products • Buffered clock and control Inputs • Shift left and shift right capability • Synchronous parallel and serial data transfers

74LS113

Abstract: C0056
Contextual Info: 74LS113, S113 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION T h e '1 1 3 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, S e t and Clock inputs. Th e asynchro­ nous S e t Sq input, w hen LOW , forces

ic 74132

Abstract: f 74132 LS132 74132 853051 R/ls 74132
Contextual Info: 74132, LS132 SigneHcs Schmitt Triggers Quad 2-Input NAND Schmitt Trigger Product Specification Logic Products The '132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming