MO088 Search Results

1709 013

Abstract: CY7C1399BN CY7C1399BN-12VC CY7C1399BN-12VXC CY7C1399BN-12VXI CY7C1399BN-12ZC CY7C1399BN-12ZXC CY7C1399BNL-12ZC CY7C1399BNL-12ZXC
Contextual Info: CY7C1399BN 256K 32K x 8 Static RAM Features expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and tri-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected.

TAA 691

Abstract: C1648 CY7C164 CY7C166 C1649 1709 013 c164 7C166 CY7C164-25 CY7C166-15
Contextual Info: CY7C164 CY7C166 16K x 4 Static RAM Features Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable CE and tri-state drivers. The CY7C166 has an active LOW Output

85031

Abstract: CY7C199CN cy7c199cn-15pxc
Contextual Info: CY7C199CN 256K 32K x 8 Static RAM General Description [1] Features • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs

CY7C1007D-10VXI

Abstract: CY7C107D CY7C107D-10VXI
Contextual Info: CY7C107D CY7C1007D 1-Mbit 1M x 1 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C107B/CY7C1007B • High speed — tAA = 10 ns • Low Active Power — ICC = 80 mA @ 10 ns • Low CMOS Standby Power The CY7C107D and CY7C1007D are high-performance

TAA 691

Abstract: CY7C128A-20VXC transistor C128 C128A CY7C128A CY7C128A-15PC CY7C128A-15VC CY7C128A-15VXC CY7C128A-35VC CY7C128A-45PC
Contextual Info: CY7C128A 2K x 8 Static RAM Features Functional Description • Automatic power-down when deselected The CY7C128A is a high-performance CMOS static RAM organized as 2048 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE , and active

CY7C1006D

Abstract: CY7C106D CY7C106D-10VXI 7C106D
Contextual Info: CY7C106D CY7C1006D 1-Mbit 256K x 4 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C106B/CY7C1006B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power — ISB2 = 3.0 mA

CY7C199CN

Abstract: TSOP 173 g
Contextual Info: CY7C199CN 256K 32K x 8 Static RAM General Description [1] Features • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs

HE144

Abstract: PDIP24 JEP95 tqfp128 weight MDS727
Contextual Info: ZMD-Standard November 1995 Package PDIP8 300 mil MDS 729 Supersedes Edition 01.95 Dimensions in millimetres Based on IEC 191-2N: Type 050G02 E 1 Dimensions L A1 A Seating Plane Z b1 e 0,254 M c θ 8 e1 1 D Pin 1 Index area Dimensions of Sub-Group B1 Dimensions of Sub-Group C1

MT 5388 BGA

Abstract: Broadcom 7019 BTS 6000 ericsson alcatel 1511 mux mobile switching center msc ericsson bts 6000 2x4 TTL demultiplexer cisco 2801 ericsson bts Technical specification alcatel 1511
Contextual Info: IDT Product Selector Guide Accelerated Thinking SM Table of Contents Integrated Processors Flow-Control Management Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Contextual Info: CY7C192 64K x 4 Static RAM with Separate I/O Features Functional Description • High speed The CY7C192 is a high-performance CMOS static RAM organized as 65,536 x 4 bits with separate I/O. Easy memory expansion is provided by active LOW Chip Enable CE and

MMA6

Abstract: MO088
Contextual Info: CY7C194BN 256 Kb 64K x 4 Static RAM General Description [1] Features • Fast access time: 15 ns and 25 ns • Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) • CMOS for optimum speed/power • TTL-compatible inputs and outputs • CY7C194BN is available in 24 DIP, 24 SOJ packages.

CY7C199D-10VXI

Abstract: 1709 013 CY7C199C CY7C199D CY7C199D-10ZXI 7C199D-10 18THD
Contextual Info: CY7C199D 256K 32K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C199C The CY7C199D is a high-performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active

CY7C185-35SC

Abstract: 1709 013 CY7C185 CY7C185-15VI CY7C185-20PXC BUT14
Contextual Info: CY7C185 64-Kbit 8K x 8 Static RAM Features Functional Description • High speed ❐ 15 ns ■ Fast tDOE ■ Low active power ❐ 715 mW ■ Low standby power ❐ 85 mW The CY7C185[1] is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is

CY7C191

Abstract: CY7C192 CY7C192-15VC CY7C192-15VXC
Contextual Info: CY7C192 64K x 4 Static RAM with Separate IO Features Functional Description • High speed ❐ 15 ns ■ CMOS for optimum speed/power ■ Low active power ❐ 860 mW The CY7C192 is a high performance CMOS static RAM organized as 65,536 x 4 bits with separate IO. Easy memory

Contextual Info: CY7C1399BN 256K 32K x 8 Static RAM Functional Description[1] Features • Single 3.3V power supply The CY7C1399BN is a high-performance 3.3V CMOS Static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and

Contextual Info: CY7C107BN CY7C1007BN 1M x 1 Static RAM Features Functional Description The CY7C107BN and CY7C1007BN are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable CE and three-state drivers. These devices have an

tPD10

Contextual Info: CY7C107D CY7C1007D 1-Mbit 1M x 1 Static RAM Features Functional Description[1] • Pin- and function-compatible with CY7C107B/CY7C1007B • High speed — tAA = 10 ns • Low Active Power — ICC = 60 mA @ 10 ns • Low CMOS Standby Power • • • •

CY7C197BN

Abstract: CY7C197BN-12VC CY7C197BN-15VC CY7C197BN-25PC TAA 691
Contextual Info: CY7C197BN 256 Kb 256K x 1 Static RAM General Description [1] Features • • • • • Fast access time: 12 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL compatible inputs and outputs Available in 24-lead DIP and 24-lead SOJ

cy7c109bnl

Abstract: CY7C109BNL-15VC CY7C1009BN CY7C109BN
Contextual Info: CY7C109BN CY7C1009BN 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109BN/CY7C1009BN is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW

CY7C192-25PC

Contextual Info: CY7C192 64K x 4 Static RAM with Separate I/O Features Functional Description • High speed The CY7C192 is a high-performance CMOS static RAM organized as 65,536 x 4 bits with separate I/O. Easy memory expansion is provided by active LOW Chip Enable CE and

12VXA

Contextual Info: CY7C199CN 256K 32K x 8 Static RAM General Description[1] Features • • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs

1709 013

Abstract: CY7C1006D CY7C106D CY7C106D-10VXI
Contextual Info: CY7C106D CY7C1006D 1-Mbit 256K x 4 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C106B/CY7C1006B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power — ISB2 = 3.0 mA

497AA

Abstract: bs 1600 1215E 497AE ncr sdc
Contextual Info: User Manual April 2001 497AE and 1215E Boundary-Scan Master 2 Advanced Operational Mode Features • The BSM2 is available in 2 versions: — The 497AE is available in a 28-pin SOJ package — The 1215E device is available in a 48-pin TQFP package ■ The 497AE and 1215E differ in the following capabilities

CY7C199D-10VXI

Abstract: CY7C199D-10ZXI CY7C199C CY7C199D MO088
Contextual Info: CY7C199D 256K 32K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C199C The CY7C199D is a high-performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active