MBIT Search Results

Contextual Info: TOSHIBA TC58V64FT/DC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64-MBIT 8M X 8 BITS CMOS NAND E2PROM DESCRIPTION The TC58V64FT/DC is a single 3.3-V 64-Mbit (69,206,016-bit) NAND electrically erasable and programmable read-only memory (NAND E2PROM) organized as 528 bytes X 16 pages X 1024 blocks.

tc58v32ft

Abstract: TC58V32
Contextual Info: IN TEG RA TED CIRCUIT TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC58V32 FT TO SHIBA TECHNICAL DATA SILICON GATE CMOS 32 MBIT 4 M X 8 BITS CMOS NAND E2PROM TENTATIVE DATA DESCRIPTION The TC58V32FT device is a single 3.3-volt 33 M (34,603,008) bit NAND Electrically Erasable and

Contextual Info: INTEGRATED TOSHIBA CIRCUIT TECHNICAL DATA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC58A040 F SILICON GATE CMOS 4 MBIT 4 M X 1 BITS CMOS AUDIO NAND E2PROM TENTATIVE DATA DESCRIPTION The TC58A040 is a 5-volt 4 Mbit NAND Electrically Erasable and Programmable Read Only Memory

Contextual Info: SN65LVDS1050 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS SLLS343A – APRIL 1999 – REVISED MARCH 2000 D D D D D D D D D D D Typically Meets or Exceeds ANSI TIA/EIA-644-1995 Standard Operates From a Single 2.4-V to 3.6-V Supply Signaling Rates up to 400 Mbit/s

Contextual Info: Envoy -8FE Device Octal Fast Ethernet Controller TXC-06840 FEATURES DESCRIPTION • 8 Independent SMII ports operating at 10/100 Mbit/s mixed mode • 8 Media Access Controllers MACs each connected to an SMII port • POS-PHY Level 2 interface operating at 50 MHz

of TX6A RX6A

Abstract: RX6A tx2c transmitter RX6a 1211 TX1B TXC-06885 diode GFP AA tx6c TX5b rx5b Ethernet over SONET mapper
Contextual Info: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)

DSLAM structure

Contextual Info: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or redundancy

DOCUMENTATION OF SHADOW ALARM

Abstract: ndf 020-21
Contextual Info: T1Mx28 Device DS1 Mapper 28-Channel TXC-04228 TECHNICAL OVERVIEW PRODUCT PREVIEW FEATURES DESCRIPTION • Twenty-eight independent 1.544 Mbit/s DS1 mappers • Single/dual byte-parallel Telecom Bus @ 6.48 MHz 28 slots or 19.44 MHz (84 slots) • Floating VT1.5 byte-synchronous mapping for use

Contextual Info: PHAST -12N Device STM-4/OC-12 SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06312 DESCRIPTION • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and clock synthesis - single 622.08 Mbit/s STM-4/OC-12 signal or - four 155.52 Mbit/s STM-1/OC-3 signals

S25FL256

Abstract: S25FL256SA S25FL256SAGMFI00 S25FL256SAG FL256SA fl256saif00 S25FL256S FL128S S25FL256* spansion S25FL256SAGMF
Contextual Info: S25FL128S and S25FL256S S25FL128S 128 Mbit 16 Mbyte S25FL256S 256 Mbit (32 Mbyte) MirrorBit Flash Non-Volatile Memory CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface with Multi-I/O S25FL128S and S25FL256S Cover Sheet Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion®

atmel100

Abstract: AT25DQ321 AT25DQ161 AT25DQ
Contextual Info: Atmel AT25DQ161 16-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support Features DATASHEET Not Recommended for New Designs Use AT25DQ321  Single 2.7V - 3.6V supply  Serial Peripheral Interface SPI compatible Supports SPI Modes 0 and 3

gem 65

Abstract: modbus wago
Contextual Info: Data sheet from 20.06.2012 Item no.: 750-842 Product description: ETHERNET TCP/IP PROGRAMMABLE FIELDBUS CONTROLLER 10 MBit/s DIGITAL AND ANALOG SIGNALS Produkt kann von Bild abweichen / product may differ Packing unit 1 piece RoHS compliant Product group 15 I/O System

smd diode ua

Abstract: transistor smd marking 2SC3648
Contextual Info: Transistors SMD Type High-Voltage Switching Applications 2SC3648 Features Adoption of FBET, MBIT Processes High Breakdown Voltage and Large Current Capacity Fast Switching Speed Absolute Maximum Ratings Ta = 25 Parameter Symbol Rating Unit Collector-Base Voltage

bzx 850

Abstract: bzx 850 30
Contextual Info: CY7C1412AV18 CY7C1414AV18 36 Mbit QDR II SRAM Two Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all accesses

M95M01-D

Abstract: M95M01-DF marking M95 m01d
Contextual Info: M95M01-DF M95M01-R 1-Mbit serial SPI bus EEPROM Datasheet − production data Features • Compatible with the Serial Peripheral Interface SPI bus ■ Memory array – 1 Mb (128 Kbytes) of EEPROM – Page size: 256 bytes SO8 (MN) 150 mil width ■ Write

CY14B101LA-SZ45XI

Abstract: CY14B101LA-SZ25XI
Contextual Info: CY14B101LA CY14B101NA 1 Mbit 128K x 8/64K x 16 nvSRAM 1 Mbit (128K x 8/64K x 16) nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14B101LA) or 64K x 16 (CY14B101NA) ■ Hands off Automatic STORE on Power Down with only a Small

Contextual Info: M27W401 4 Mbit 512Kb x 8 Low Voltage UV EPROM and OTP EPROM Features • 2.7V to 3.6V Supply Voltage in Read Operation ■ Access Time: – 70 ns at VCC = 3.0V to 3.6V – 80 ns at VCC = 2.7V to 3.6V ■ ■ Pin Compatible with M27C4001 1 Programming Time 100 µs/byte

Contextual Info: CY7C1346H 2-Mbit 64K x 36 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 64K x 36 common I/O architecture • 3.3V core power supply • 3.3V/2.5V I/O operation • Fast clock-to-output times

CY7C1059DV33

Abstract: CY7C1059DV33-10BAXI CY7C1059DV33-10ZSXI
Contextual Info: PRELIMINARY CY7C1059DV33 8-Mbit 1M x 8 Static RAM Functional Description[1] Features • High speed — tAA = 10 ns The CY7C1059DV33 is a high-performance CMOS Static RAM organized as 1M words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an

2SC3686

Contextual Info: Product Specification www.jmnic.com 2SC3686 Silicon NPN Power Transistors ESCRIPTION ・High breakdown voltage ・High reliability adoption of HVP process . ・Fast speed ・Adoption of MBIT process. ・With TO-3PN package APPLICATIONS ・Ultrahigh-definition color display horizontal

IS42S32400D

Abstract: 42S32400D is42s32400d-6bli IS42S32400D-7TLI
Contextual Info: IS42S32400D 4Meg x 32 128-MBIT SYNCHRONOUS DRAM FEATURES • Clock frequency: 166, 143, 125, 100 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge MARCH 2009 OVERVIEW ISSI's 128Mb Synchronous DRAM achieves high-speed

M29W320DT

Abstract: M29W320D M29W320DB TFBGA48
Contextual Info: M29W320DT M29W320DB 32 Mbit 4Mb x8 or 2Mb x16, Boot Block 3V Supply Flash Memory FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VCC = 2.7V to 3.6V for Program, Erase and Read – VPP =12V for Fast Program (optional) ■ ACCESS TIME: 70, 90ns

HB56A140BR

Contextual Info: HB56A140BR Series 1,048,576-word x 40-bit High Density Dynamic RAM Module The HB56A140BR is a 1M × 40 dynamic RAM module, mounted 10 pieces of 4-Mbit DRAM HM514400BS/BLS/CS/CLS sealed in SOJ package. An outline of the HB56A140BR is 72pin single in-line package. Therefore, the

16C450

Abstract: MS-018 PC16552 PC16C552 PLCC44 SC16C2552B SC16C2552BIA44 ST16C2552
Contextual Info: SC16C2552B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s max. , with 16-byte FIFOs Rev. 03 — 12 February 2009 Product data sheet 1. General description The SC16C2552B is a two channel Universal Asynchronous Receiver and Transmitter (UART) used for serial data communications. Its principal function is to convert parallel