part MARKING k48
Abstract: marking bc p28 CMSD4448 W4W MARKING CM0Z15L CMZ5936B CM0Z11V CMZ5945B marking 6ca marking code ca2
Contextual Info: Marking Codes Continued Marking Code Part Number Marking Code 04 04D 04A 04C 04S 040 1A 1A8 1AC 1B 1B8 1C8 1D8 1E 1E8 1F 1F8 1FF 1G 1G8 1H8 1J 1J8 1K 1K8 1L 1L8 1M8 1P 1PC 1QC 1F)C 2AC 2B 2C 2CA 2F 2FC 2G 2PC 2QC 2P 3A 3B 3E 3F 3G 3J 3K 3L 3P 4A 4B 4C 4E
|
OCR Scan
|
cmod2004cmld2004cmld2004acmld2004c+16cmld2004scmld2004dobc846acmsz5250bcmst3904bc846bpart marking k48marking bc p28cmsd4448w4w markingcm0z15lcmz5936bcm0z11vcmz5945bmarking 6camarking code ca2
|
PDF
|
AS5SS256K36
Abstract: AS5SS256K36A 876-3210
Contextual Info: SSRAM AS5SS256K36 & AS5SS256K36A Austin Semiconductor, Inc. 256K x 36 SSRAM PIN ASSIGNMENT Top View Flow-Through, Synchronous Burst SRAM 100-pin TQFP (DQ) (2-chip enable version, “A” indicator) FEATURES ! ! ! ! ! ! ! ! ! ! ! OPTIONS MARKING DQ No. 1001
|
Original
|
as5ss256k36as5ss256k36a100-pinas5ss256k36adq-8+1876-3210
|
PDF
|
|
Contextual Info: CMBT4123 GENERAL PURPOSE TRANSISTOR N -P-N transistor Marking CMBT4123 = 5B PACKAGE OUTLINE DETAILS ALL DIMENSIONS IN mm 3.0 2.8 0.14 0.09 0.48 0.38 § 3 Pin configuration 1 = BASE 2 = EMITTER 3 = COLLECTOR Ï 1.4 1.2 2.6 2.4 R0.1 CckhT I f<R 0 .0 5 J 1’.0 2 ]
|
OCR Scan
|
cmbt4123 |
PDF
|
lpddr2 256mb
Abstract: NT6DM8M32AC-T1 NT6DM16M16AD NT6DM8M32AC lpddr2 layout NT6DM8M32 Dual LPDDR2 lpddr2 256mb kgd lpddr2-s2
Contextual Info: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature Double-data rate architecture; two data transfer per clock cycle Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking VDD /VDDQ
|
Original
|
256mbnt6dm16m16adnt6dm8m32ac-16meg+816m16lpddr2 256mbnt6dm8m32ac-t1lpddr2 layoutnt6dm8m32dual lpddr2lpddr2 256mb kgdlpddr2-s2
|
PDF
|
NT6DM16M16AD-T1
Abstract: 64M32 HP 3458 NT6DM16M16AD-T1I
Contextual Info: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature Double-data rate architecture; two data transfer per clock cycle Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking VDD /VDDQ
|
Original
|
256mbnt6dm16m16adnt6dm8m32ac-16meg+516m16nt6dm16m16ad-t164m32hp 3458nt6dm16m16ad-t1i
|
PDF
|
NT6DM16M
Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options Double-data rate architecture; two data transfer per clock cycle Bidirectional, data strobe DQS is transmitted/received with Marking VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver
|
Original
|
512mbnt6dm32m16adnt6dm16m32ac-32meg+432m16-16meg16m32nt6dm16m
|
PDF
|
NT6DM32M16AD-T1
Abstract: NT6DM32M16AD NT6DM16M32AC-T1 NT6DM16M32AC NT6DM16M32AC-T3 216-ball NT6DM32M16AD-T3 256M16 lpddr2 256mb lpddr2 layout
Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options Double-data rate architecture; two data transfer per clock cycle Bidirectional, data strobe DQS is transmitted/received with Marking VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver
|
Original
|
512mbnt6dm32m16adnt6dm16m32ac-32meg+11-16meg-60-ball-90-ballnt6dm32m16ad-t1nt6dm16m32ac-t1nt6dm16m32ac-t3216-ballnt6dm32m16ad-t3256m16lpddr2 256mblpddr2 layout
|
PDF
|
LPDDR 8Gb
Abstract: lpddr2 256mb NT6DM32M16AD-T1 NT6DM32M16AD nanya lpddr2 spec
Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options Double-data rate architecture; two data transfer per clock cycle Bidirectional, data strobe DQS is transmitted/received with Marking VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver
|
Original
|
512mbnt6dm32m16adnt6dm16m32ac-32meg+7-16meg-60-ball-90-balllpddr 8gblpddr2 256mbnt6dm32m16ad-t1nanya lpddr2 spec
|
PDF
|
MT42L32M32D2
Abstract: micron lpddr2 LPDDR2 SDRAM LPDDR2 SDRAM micron MT42L32M32
Contextual Info: Preliminary‡ 512Mb Automotive Mobile LPDDR2 SDRAM Features Automotive Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L32M32D2, MT42L16M32D1 Features Options Marking • VDD2: 1.2V • Configuration – 4 Meg x 32 x 4 banks – 8 Meg x 16 x 4 banks – 2 x 8 Meg x 16 x 4 banks
|
Original
|
512mbmt42l32m16d1mt42l32m32d2mt42l16m32d1+509005aef84d56533micron lpddr2lpddr2 sdramlpddr2 sdram micronmt42l32m32
|
PDF
|
|
Contextual Info: 512Mb: x16 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L32M16D1 Features Options Marking • VDD2: 1.2V • Configuration – 8 Meg x 16 x 4 banks • Device type – LPDDR2-S4, 1 die in package • FBGA “green” package – 121-ball FBGA 6.5mm x 8mm
|
Original
|
512mbmt42l32m16d109005aef8467caf2 |
PDF
|
MT41K256M16HA
Abstract: D9PZD MT41K256M16H MT41K256M16HA-107 5CK 055 MARKING CCK -SDRAM MT41K256M16 MT41K256M16HA-107G smd CCK 96-ball FBGA
Contextual Info: 4Gb: x16 gDDR3L SDRAM Graphics Addendum Features gDDR3L SDRAM Graphics Addendum MT41K256M16 – 32 Meg x 16 x 8 Banks Features Options Marking • Configuration – 256 Meg x 16 • FBGA package Pb-free – x16 – 96-ball (9mm x 14mm) Rev. E • Timing – cycle time
|
Original
|
mt41k256m1609005aef84b213ddmt41k256m16had9pzd+7mt41k256m16hmt41k256m16ha-1075ck 055marking cck -sdrammt41k256m16ha-107gsmd cck96-ball fbga
|
PDF
|
|
Contextual Info: Preliminary‡ 512Mb Automotive Mobile LPDDR2 SDRAM Features Automotive Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L32M32D2 Features Options Marking • VDD2: 1.2V • Configuration – 8 Meg x 16 x 4 banks – 2 x 8 Meg x 16 x 4 banks • Device type – LPDDR2-S4, 1 die in package
|
Original
|
512mbmt42l32m16d1mt42l32m32d2121-ball+2134-ball09005aef84d56533
|
PDF
|
|
Contextual Info: Preliminary‡ 512Mb Automotive Mobile LPDDR2 SDRAM Features Automotive Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L32M32D2 Features Options Marking • VDD2: 1.2V • Configuration – 8 Meg x 16 x 4 banks – 2 x 8 Meg x 16 x 4 banks • Device type – LPDDR2-S4, 1 die in package
|
Original
|
512mbmt42l32m16d1mt42l32m32d2121-ball+2134-ball09005aef84d56533
|
PDF
|
MT41K128M16JT
Contextual Info: 2Gb: x16 gDDR3L SDRAM Graphics Addendum Features gDDR3L SDRAM Graphics Addendum MT41K128M16 – 16 Meg x 16 x 8 Banks Features Options Marking • Configuration – 128 Meg x 16 • FBGA package Pb-free – x16 – 96-ball (8mm x 14mm) Rev. K • Timing – cycle time
|
Original
|
mt41k128m1696-ballgddr3l-180009005aef84c55782+1mt41k128m16jt
|
PDF
|
|
|
MT41K128M16JT
Abstract: MT41K128m16j MT41K128M16JT-107 MT41K128M16 MT41K128M16JT-107G
Contextual Info: 2Gb: x16 gDDR3L SDRAM Graphics Addendum Features gDDR3L SDRAM Graphics Addendum MT41K128M16 – 16 Meg x 16 x 8 Banks Features Options Marking • Configuration – 128 Meg x 16 • FBGA package Pb-free – x16 – 96-ball (8mm x 14mm) Rev. K • Timing – cycle time
|
Original
|
mt41k128m1609005aef84c55782mt41k128m16jtmt41k128m16j+2mt41k128m16jt-107mt41k128m16jt-107g
|
PDF
|
MT41J256M16
Abstract: MT41J256M16HA MT41J256M16HA-093 MT41J256M16HA-093G MT41J256M16H d9pzm
Contextual Info: 4Gb: x16 gDDR3 SDRAM Graphics Addendum Features gDDR3 SDRAM Graphics Addendum MT41J256M16 – 32 Meg x 16 x 8 Banks Features Options Marking • Configuration – 256 Meg x 16 • FBGA package Pb-free – x16 – 96-ball (9mm x 14mm) Rev. E • Timing – cycle time
|
Original
|
mt41j256m1664mbox09005aef84c564b5mt41j256m16ha+4mt41j256m16ha-093mt41j256m16ha-093gmt41j256m16hd9pzm
|
PDF
|
AS5SS256K36
Abstract: 43251 876-3210
Contextual Info: SSRAM Austin Semiconductor, Inc. 256K x 36 SSRAM PIN ASSIGNMENT Top View Flow-Through, Synchronous Burst SRAM FEATURES z z z z z z z z z z z OPTIONS MARKING Timing 8.5ns/10ns/100MHz 10ns/15ns/66MHz z Packages 100-pin TQFP (2-chip enable) z Pinout 3-chip Enable
|
Original
|
100-pinportables5ss256k36as5ss256k36-40oc+585oc1-55oc125oc43251876-3210
|
PDF
|
MT47H128M8CF-25
Abstract: 8 resistor array 10k smd 103
Contextual Info: 1Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • Marking • Configuration
|
Original
|
mt47h128m8mt47h64m1618-compatible8192-cycle+309005aef840eff89mt47h128m8cf-258 resistor array 10k smd 103
|
PDF
|
|
Contextual Info: 2Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • • Marking • Configuration
|
Original
|
mt47h256m8mt47h128m1660-ball84-ball+3ddr2-800ddr2-66709005aef8441c566
|
PDF
|
D9PRS
Abstract: MT41J128M16JT-125 MICRON gddr3 mt41j128m16ha MT41J128M16JT gddr3 GDDR3-1800 MT41J128M16HA-125 MT41J128M16HA-107G MT41J128M16JT-107G
Contextual Info: 2Gb: x16 gDDR3 SDRAM Graphics Addendum Features gDDR3 SDRAM Graphics Addendum MT41J128M16 – 16 Meg x 16 x 8 Banks Features Options Marking • Configuration – 128 Meg x 16 • FBGA package Pb-free – x16 – 96-ball (9mm x 14mm) Rev. D – 96-ball (8mm x 14mm) Rev. K
|
Original
|
mt41j128m1664mbox09005aef84255871d9prs+9mt41j128m16jt-125micron gddr3mt41j128m16hamt41j128m16jtgddr3gddr3-1800mt41j128m16ha-125mt41j128m16ha-107gmt41j128m16jt-107g
|
PDF
|
MT42L16M32
Abstract: MT42L16M32D1 MT42L16M32D MT42L32M16D1 MT42L32M16D PS 229 LPDDR2 PoP LPDDR2 DRAM LPDDR2-1066 Micron LPDDR2
Contextual Info: 512Mb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L16M32D1 Features Options Marking • VDD2: 1.2V • Configuration – 4 Meg x 32 x 4 banks – 8 Meg x 16 x 4 banks • Device type – LPDDR2-S4, 1 die in package • FBGA “green” package
|
Original
|
512mbmt42l32m16d1mt42l16m32d109005aef8467caf2+8mt42l16m32mt42l16m32dmt42l32m16dps 229lpddr2 poplpddr2 dramlpddr2-1066micron lpddr2
|
PDF
|
MT42L16M32D1
Abstract: 7600B Dynamic Memory Refresh Controller LPDDR2-1066 121ball
Contextual Info: 512Mb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L16M32D1 Features Options Marking • VDD2: 1.2V • Configuration – 4 Meg x 32 x 4 banks – 8 Meg x 16 x 4 banks • Device type – LPDDR2-S4, 1 die in package • FBGA “green” package
|
Original
|
512mbmt42l32m16d1mt42l16m32d109005aef8467caf2+47600bdynamic memory refresh controllerlpddr2-1066121ball
|
PDF
|
Elpida LPDDR2 Memory
Abstract: MT46H32M32LF MT46H64M16LF
Contextual Info: 1Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H64M16LF – 16 Meg x 16 x 4 Banks MT46H32M32LF – 8 Meg x 32 x 4 Banks Features Options Marking • VDD/VDDQ – 1.8V/1.8V • Configuration – 64 Meg x 16 16 Meg x 16 x 4 banks
|
Original
|
mt46h64m16lfmt46h32m32lf09005aef82ce3074elpida lpddr2 memory |
PDF
|
|
Contextual Info: 1Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • Marking • Configuration
|
Original
|
mt47h128m8mt47h64m1684-ball60-ball+3ddr2-800ddr2-66709005aef85a711f4
|
PDF
|