LTXD E3 Search Results

redux 204

Abstract: V54C365164VCT8PC LTXD e3 mii to hdlc RS-120 DC-DS-0120 MA10 rs120a DC-AN-0120-004 MD1811
Contextual Info: RS-120 Data Sheet Features • 100 Mbps full duplex protocol conversion and bridging • up to100 Mbps MII; 100 Mbps HDLC • MII - HDLC Operating Mode • MII - MII Operating Mode • “drop-in” solution • no external CPU required • no software development required

x22 umi

Abstract: PM7350 LTXD e3 x23 umi 0X00 rdat
Contextual Info: PM7350 S/UNI-DUPLEX PRELIMINARY DATA SHEET PMC-980581 ISSUE 4 DUAL SERIAL LINK, PHY MULTIPLEXER PM7350 S/UNI-DUPLEX DUAL SERIAL LINK, PHY MULTIPLEXER DATA SHEET PRELIMINARY ISSUE 4: FEBRUARY 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

h54y

Contextual Info: PM7350 S/UNI-DUPLEX RELEASED DATA SHEET DUAL SERIAL LINK PHY MULTIPLEXER PM ISSUE 7 09 :4 7: 38 PMC-1980581 ,2 00 5 PM7350 TM 9M ay S/UNI- nd ay ,0 DUPLEX of ag er rt on Mo S/UNI-DUPLEX Do wn lo ad ed by sa tis h d DUAL SERIAL LINK, PHY MULTIPLEXER DATA SHEET

Contextual Info: PM7350 S/UNI DUPLEX RELEASED DATA SHEET DUAL SERIAL LINK PHY MULTIPLEXER PM ISSUE 8 08 :0 3: 38 PMC-1980581 20 05 PM7350 TM be r, S/UNI- ,1 4D ec em DUPLEX n W ed ne sd ay S/UNI DUPLEX DATA SHEET RELEASED ISSUE8: DECEMBER 2005 Do wn lo ad ed by Co nt e nt

x23 umi

Abstract: x22 umi TB 1275 N DATA SHEET umi d2 x23 0X00 PM7350 LTXD e3 23w24
Contextual Info: PM7350 S/UNI-DUPLEX RELEASED DATA SHEET PMC-1980581 ISSUE 5 DUAL SERIAL LINK PHY MULTIPLEXER PM7350 TM S/UNI- DUPLEX S/UNI-DUPLEX DUAL SERIAL LINK, PHY MULTIPLEXER DATA SHEET RELEASED ISSUE 5: APRIL 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PM7350

Abstract: pm7350bi CRC191
Contextual Info: PM7350 S/UNI-DUPLEX PRELIMINARY DATA SHEET PMC-980581 ISSUE 3 DUAL SERIAL LINK, PHY MULTIPLEXER PM7350 TM S/UNI- DUPLEX S/UNI-DUPLEX DUAL SERIAL LINK, PHY MULTIPLEXER DATA SHEET PRELIMINARY ISSUE 3: JUNE 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: PM7350 S/UNI-DUPLEX RELEASED DATA SHEET DUAL SERIAL LINK PHY MULTIPLEXER AM ISSUE 7 08 :5 7: 00 PMC-1980581 ,2 00 5 PM7350 TM ch S/UNI- ay ,1 8M ar DUPLEX in er In co n Fr id S/UNI-DUPLEX DATA SHEET RELEASED ISSUE 7: MARCH 2005 Do wn l oa d ed by Co nt en

Contextual Info: PM7350 S/UNI-DUPLEX RELEASED DATA SHEET ISSUE 6 DUAL SERIAL LINK PHY MULTIPLEXER :5 0: 32 PM PMC-1980581 00 4 12 PM7350 TM er ,2 S/UNI- ,2 9O ct ob DUPLEX In co n Fr id ay S/UNI-DUPLEX DATA SHEET RELEASED ISSUE 6: APRIL 2002 Do wn lo ad ed by Co nt e nt T

Contextual Info: PM7350 S/UNI-DUPLEX RELEASED DATA SHEET DUAL SERIAL LINK PHY MULTIPLEXER PM ISSUE 7 11 :0 7: 36 PMC-1980581 20 05 PM7350 TM ul y, S/UNI- sd ay ,0 7J DUPLEX er In co n Th ur S/UNI-DUPLEX DATA SHEET RELEASED ISSUE 7: MARCH 2005 Do wn lo ad ed by C on te n tT

Contextual Info: DATA S H E E T PM PM C -980581 ISSUE 3 PRELIMINARY PMC-Sierra, Inc. PM7350 s /u n i-d u p le x DUAL SERIAL LINK, PHY MULTIPLEXER PM7350 S/UNI- TM DUPLEX S/UNI-DUPLEX DUAL SERIAL LINK, PHY MULTIPLEXER DATA SHEET PRELIMINARY ISSUE 3: JUNE 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: 1.0 Product Description The R S8228 Octal ATM Transm ission Convergence TC PH Y device dram ati­ cally increases the level o f integration for switches and access systems. The R S8228 integrates all o f the ATM Layer processing functions found in the ATM

DTS-550

Abstract: RXD26 TXD30
Contextual Info: Advisory June 2002 TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger The CK clock period stability in Table 45 on page 55 of data sheet DS02-235SWCH is incomplete. The input jitter modulation type and frequency were not specified. Table 1 below addresses that discrepancy and

Contextual Info: Preliminary Data Sheet June 2003 TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways.

circuit diagram for speed checker for highways

Abstract: highway speed checker application only highway speed checker highway speed checker circuit diagram highway speed checker block diagram RXD29 circuit diagram of speed checker for highway TTSI1K16T TTSI2K32T TTSI4K32T
Contextual Info: Advisory October 2002 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger Introduction This document describes a technical issue that is known to exist with the device. Issue Duty Cycle and Jitter Sensitivity on the CK Pin Agere Systems Inc. has determined that there is an issue with duty cycle and jitter sensitivity on the CK pin

SPEED CHECKER FOR HIGHWAY

Abstract: circuit diagram for speed checker for highways
Contextual Info: Data Sheet June 2003 TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways. Full availability, nonblocking 4096-channel time/

Contextual Info: Preliminary Data Sheet May 2002 TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways.

highway speed checker

Abstract: highway speed checker application only SPEED CHECKER FOR HIGHWAY highway speed checker circuit diagram highway speed checker block diagram
Contextual Info: Data Sheet December 2004 TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger Features „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ Thirty-two full-duplex, serial time-division multiplexed TDM highways. Full availability, nonblocking 4096-channel time/

circuit diagram for speed checker for highways

Abstract: highway speed checker block diagram highway speed checker highway speed checker application only TTSI2K32T Agere 217 PBGA LTXD e3 multiport injection TTSI4K32T3BAL TTS12K32T
Contextual Info: Preliminary Data Sheet February 1999 TTS12K32T 2048-Channel, 32-Highway Time-Slot Interchange Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways.

highway speed checker

Abstract: data sheet ic 7495 highway speed checker block diagram ic 7495 data sheet multiport injection Shift Register IC 7495 TTSI2K32T TTSI4K32T LTXD e3
Contextual Info: Data Sheet June 2000 TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways. Full availability, nonblocking 4096-channel time/

highway speed checker application only

Abstract: highway speed checker circuit diagram circuit diagram of speed checker for highway SPEED CHECKER FOR HIGHWAY highway speed checker highway speed checker block diagram circuit diagram for speed checker for highways
Contextual Info: Advisory October 2002 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger Introduction This document describes a technical issue that is known to exist with the device. Issue Duty Cycle and Jitter Sensitivity on the CK Pin Agere Systems Inc. has determined that there is an issue with duty cycle and jitter sensitivity on the CK pin

Contextual Info: Advisory June 2003 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger Introduction This document describes a technical issue that is known to exist with the device. Issue Version 1 TTSI4K32T, TTSI2K32T, and TTSI1K16T Duty Cycle and Jitter Sensitivity on the CK Pin

highway speed checker

Abstract: TTSI1K16T TTSI2K32T TTSI4K32T SPEED CHECKER FOR HIGHWAY
Contextual Info: Advisory February 5, 2004 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger 1 Discussion The VDD range of these devices has been tightened from ± 10% to ± 5% because bit errors have been observed on some devices at VDD below –5%.

circuit diagram for speed checker for highways

Abstract: highway speed checker TTSI1K16T TTSI2K32T TTSI4K32T SPEED CHECKER FOR HIGHWAY N15 G
Contextual Info: Advisory October 2002 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger Introduction This document describes a technical issue that is known to exist with the device. Issue Duty Cycle and Jitter Sensitivity on the CK Pin Agere Systems Inc. has determined that there is an issue with duty cycle and jitter sensitivity on the CK pin

circuit diagram for speed checker for highways

Contextual Info: Preliminary Data Sheet February 1999 TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways.