LS377 Search Results

SN74AHC1G125

Contextual Info: SN74AHC1G125 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT S C LS377B - A U G U S T 1 997 - R EVISED JU N E 1998 Operating Range 2-V to 5.5-V Vc c DBV O R DCK PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Process Package Options Include Plastic

ls378

Abstract: LS377 LS379 SN54LS378 SN54LS379 SN74LS378 SN74LS379 37Dh
Contextual Info: LS377. SN54LS378, SN54LS379. LS377, SN74LS378, SN74LS379 OCTAL, HEX. AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 O CTOBER 1 9 7 6 - REVISED M A R C H 1 9 8 8 S N 54 L S 37 7 . . . J PACKAGE 'LS377 and 'L S 378 Contain Eight and Six Flip-Flops, Respectively, w ith SingleRail Outputs

LS377

Contextual Info: LS377 £ 2 National Semiconductor LS377/LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The 'LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the

Contextual Info: NATIONAL SEUICOND -CLOGIC3- 31E D • k.501125 DQ7Q1Q3 t. LS377/LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The 'LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight

L-377

Abstract: L377
Contextual Info: MILITARY DATA SHEET Original Creation Date: 12/02/96 Last Update Date: 12/10/96 Last Major Revision Date: 12/02/96 LS377-X REV 0A0 OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK General Description The 'LS377 is an 8 - bit register built using advanced low power Schotky technology. This

Contextual Info: LS377, SN54LS378, SN54LS379, LS377, SN74LS378, SN74LS379 OCTAL, HEX. AND QUAD D TYPE FLIP-FLOPS WITH ENABLE O CTOBER 1976 - REVISED MARCH 1988 'LS377 and 'LS378 Contain Eight and

Contextual Info: LS377, SN54LS378, SN54LS379, LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE OCTOBER 1976 - R EV ISED MARCH 1988 'LS377 and 'LS 3 7 8 Contain Eight and Six Flip-Flops, Respectively, with SingleRail Outputs SN LS377 . . . J PACKAG E

T74LS377B1

Abstract: DIODE H5 Z7
Contextual Info: rZ 7 SGS-THOMSON A T # tL IO T « S o T 7 4 LS377 OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK • 8-BIT HIGH SPEED PARALLEL REGISTERS ■ POSITIVE EDGE-TRIGGED D-TYPE FLIPFLOP ■ FULLY BUFFERED COMMON CLOCK AND ENABLE INPUTS ■ INPUT CLAMP DIODES LIMIT HIGH-SPEED

ls378

Abstract: IC 7413
Contextual Info: TYPES LS377. SNS4LS378, SN54LS379, LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPi FLIP-FLOPS WITH ENABLE _ _ B U L L E T I N NO . D L-S 761 24 7«. O C T O B E R 1976 'LS377 and 'LS378 Contain Eight and

Flip-Flops

Abstract: SN74LS377
Contextual Info: LS377, SN54LS378, SN54LS379, LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 – OCTOBER 1976 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

dm74ls377n

Abstract: DM74LS377 DM54LS377 DM54LS377E DM54LS377J DM54LS377W DM74LS377WM E20A J20A LS377
Contextual Info: LS377 LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable The device is packaged in the

DM74LS377

Abstract: DM54LS377E DM54LS377J DM54LS377W DM74LS377N DM74LS377WM E20A J20A LS377
Contextual Info: LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the

ls378

Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
Contextual Info: SN54/LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

Contextual Info: R C H I I - P S E M IC O N D U C T O R tm LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low pow er Schottky technology. This register consists of eight • 8-bit high speed parallel registers

c4554

Abstract: C4581 c4072 C4549 C4015 c4632 C4510 C4014 c4582 C4063
Contextual Info: LC9100, 92000 Series No.2723A J SA\YO A k O verview The LC9100, 92000 series are semicustom LSIs especially suited to <Jéyéìop l h ^ s e r ^ q u e s t é ^ l .S l in a short period of time and at a low cost. The LC9100, 92000 series provide 17 types of m aster chip having

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

74ALS

Abstract: 74ALS377 N74ALS377D N74ALS377N
Contextual Info: LS377 Flip-Flop Octal D Flip-Flop With Enable Preliminary Specification FEATURES • Ideal for addressable register applications • Enable for address and data syn­ chronization applications • Eight edge-triggered D-type flip­ flops • Buffered common clock

74LS115

Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
Contextual Info: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25

74ls380

Abstract: SN74LS380 LS380 50/SM/74ls380
Contextual Info: Multifunction 8-Bit Register S N 5 4 /7 4 L S 3 8 0 Ordering Information Features/ Benefits • 8-bit register for general-purpose interfacing applications PART NUMBER PACKAGE • 8 bits match byte boundaries SN54LS380 JS, F • Bus-structured pinout SN74LS380

4027B

Abstract: 4013B hc374 HC-377 HC76 flip-flop HC-107 4027B equivalent hc175 HCT74
Contextual Info: SELECTION GUIDE FLIP-FLOP Type Number M54/74 Functional Equivalent LSTTL 54/74 Function Suggested Alternative LS 54/74 4000B Functional Equivalent CMOS 4000B Package DIP LS73 LS74 LS74 LS76 LS107 4027B 4013B 4013B 4027B 4027B 14 14 14 16 14 Dual J-K FLIP-FLOP with Preset and Clear

Contextual Info: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing.

74ls380

Abstract: LS380 DM54LS380J DM74LS380J DM74LS380N J24F LS273 LS374 LS377
Contextual Info: LS380 National Semiconductor DM54LS380/74LS380 Multifunction Octal Register General Description The ’LS380 is an 6 -bit synchronous register with parallel load, load complement, preset, clear, and hold capacity. Four control inputs LD, POL, CLR, PR provide one o f four

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format