LOGIC Search Results

Contextual Info: TIBPAL22V10-20M HIGH-PERFORMANCE IMPACT-X PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPSQ12A - D3523, JUNE 1 9 9 0 -R E V IS E D MARCH 1992 JT P A C K A G E Second-Generation PLD Architecture TO P V IE W High-Performance Operation: fmax (External Feedback). . . 33.3 MHz

Low Drop Out Regulators

Abstract: 7585C DIL 16
Contextual Info: o UCC2930-3\UCC3930-3 IIMTKORATKO C IR C U IT S ADVANCED INFORMATION UNITRODE Cellular Telephone Power Converter DESCRIPTION FEATURES BiCMOS Low Power RF/Cellular power management Negative 2.5 Volt @ 5 m A regulator for GaAs MESFET Separate Micro-power 3.3 V logic

IC-524

Abstract: 74as
Contextual Info: SN 54AS881A, S N 74AS 8 8 1A ARITH M ETIC LOGIC UNITS/FUNCTION G ENERATORS D 2 6 6 1 , DECEMBER 1 9 8 2 - • Package Options Include Plastic "Small Outline" Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs •

marking 3G

Contextual Info: TC4S01F TO SHIBA C MOS DIGITAL INTEGRATED C IR C U IT SILICO N M ONOLITHIC 2 INPUT NOR GATE Unit in mm + 0.2 23-0.3 The TC4S01F is 2-input positive logic NOR gates. + 0.2 Gate output w ith in v e rte r buffer im proves the 16 input-output ch arac te ristic s and if th e load

Contextual Info: TOSHIBA TC4S11F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4S11F 2 INPUT N A N D GATE The TC4S11F is 2-input positive logic NAND gates. Gate output with inverter buffer improve the inputoutput characteristics and even if the load capacitance

Contextual Info: TIEPAL10016P8-3C HIGH-PERFORMANCE ExCL mP A l CIRCUIT D 30 83. D EC E M B E R 1987 • ECL 100K PAL • High-Performance Operation Propagation Delay . . . 3 ns Max JT PACKAG E TOP VIEW I e e • • ■ - 2 2 0 mA Max • Replacement for 100K ECL Logic

TC8600F

Abstract: 1126to PHOTO INTERRUPT ROTATING SPEED SENSOR 360rpm magnetic head FDD
Contextual Info: TOSHIBA INTEGRATED CIRCUIT TC8600F TECHNICAL DATA TC8600F Fl o pp y Disk Mechanism Controller INTRODUCTION The FDMC-II TC8600F is a one chip C-MOS LSI in which the control logic of FLOPPY DISK DRIVE (FDD), together with the 4-bit CPU and required random logic.

2n5549

Contextual Info: TYPE 2N5549 N-CHANNEL SILICON JUNCTION FIELD-EFFECT TRANSISTOR B U L L E T I N N O . D L -S 7 0 1 1 1 2 4 , J U N E 1 9 7 0 FOR LOW-LEVEL CHOPPERS, LOGIC SWITCHES, MULTIPLEXERS, AND RF AND VHF AMPLIFIERS • High lyfsl/Ciss Ratio High-Frequency Figure-of-Merit

LT1036CKV

Abstract: 4-lead to-3
Contextual Info: LT1036M, LT1036C LOGIC CONTROLLED POSITIVE REGULATORS 0 3 2 1 9 , JU L Y 1 9 8 8 -R E V IS E D JA N U A R Y 1989 Two Regulated Outputs + 12 V at 3 A + 5 V at 75 mA • 2% Output Voltage Tolerance • 60-dB Ripple Rejection KJ PACKAGE TOP VIEW GND (CASE]

d2439

Abstract: p725
Contextual Info: MC3423 OVERVOLTAGE-SENSING CIRCUIT D2439, A P R IL 1978— RE V IS E D M A R C H 1988 * D OR P PACKAGE Separate Outputs for Crowbar and Logic Circuitry TOP VIEW Programmable Time Delay to Eliminate Noise Triggering TTL-Level Activation Isolated From Voltage-Sensing Inputs

TC5316200bP

Abstract: TC5316200BP/BF
Contextual Info: TOSHIBA TC5316200BP/BF SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM D escription The TC5316200BP/BF is a 16,777,216 bit read only memory organized as 1,048,576 words by 16 bits when BY I t is logical high, and organized as 2,097,152 words by 8 bits when BYTE is logical low.

Contextual Info: TC4S71F TOSHIBA C MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 2 INPUT OR GATE Unit in nm The TC4S71F contains 2-input positive logic O R gates. + 0.2 1.6-5.1 Gate output with inverter buffer improves the input-output ch aracteristics and if the load

2500VRM

Contextual Info: GaAs IRED S PHOTO-TRANSISTOR 2 6 , 2 7 , 2 8 S H O rt { ¿ IN 2 5 (S h o r t > ) AC LINE/DIGITAL LOGIC ISOLATOR. DIGITAL LOGIC /DIGITAL LOGIC ISOLATOR. TELEPHONE LINE RECEIVER. TWISTED PAIR LINE RECEIVER. HIGH FREQUENCY POWER SUPPLY FEEDBACK CONTROL. RELAY CONTACT MONITOR.

character generater

Contextual Info: 4M BIT 256K W O RD x 16 B IT / 512K W O R D x 8BIT CM OS M ASK ROM DESCRIPTION The BYTE The The TC534200P/F is a 4,194,304 bits read only memory organized as 262,144 words by 16 bits when is logical high, and is organized as 524,288 words by 8 bits when BYTE is logical low.

Contextual Info: INTRODUCTION Today's portable and battery-operated system designer is faced w ith the problem of keeping ahead when addressing system perform ance, long battery life, in terfacin g te ch n o lo gy, and reliability. Toshiba's low vo lta g e high perform ance C2MOS logic fam ilies help designers achieve these goals.

Contextual Info: TOSHIBA TLP3540 TOSHIBA PHOTOCOUPLER GaAs IRED & PHOTO-MOS FET T L P 3 540 Unit in mm M EM O R Y TESTERS LOGIC 1C TESTERS DATA RECORDING EQUIPMENT 7 6 5 CT1 n_ n l~P MEASURING EQUIPMENT TLP3540 is a photorelay and consists of a GaAs infrared emitting diode optically coupled to a photo-MOSFET in a 8-pin DIP package.

Contextual Info: TOSHIBA TLP3111 TOSHIBA PHOTOCOUPLER GaAs IRED & PHOTO-MOS FET T• I Pm v? 1■ 1■ 1■ MEASUREMENT INSTRUMENTS LOGIC IC TESTERS/MEMORY TESTERS BOARD TESTERS/SCANNERS The TOSHIBA MINI FLAT PHOTO RELAY TLP3111 is a small outline photo relay, suitable for surface m ount assembly.

t742

Contextual Info: SN54F621, SN74F621 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDFS004B - D2932, MARCH 1987 - REVISED OCTOBER 1993 • Local Bus-Latch Capability • Noninverting Logic • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic

h1775

Contextual Info: GaAs IRED & PHOTO-TRANSISTOR 4N38.38A Unit in mm AC LINE/DIGITAL LOGIC ISOLATOR. DIGITAL LOGIC/DIGITAL LOGIC ISOLATOR. TELEPHONE LINE RECEIVER. TWISTED PAIR LINE RECEIVER. HIGH FREQUENCY POWER SUPPLY FEEDBACK CONTROL. RELAY CONTACT MONITOR. The TOSHIBA 4N38 and 4N38A consist of a gallium

42c27

Contextual Info: T E X A S IN S T R -CASIC/MEMORY} 42 Ô 96Ï725 1 I PROGRAMMABLE L0G|C 42C 27235 TEXAS D E § aTt.l7 aS 0 0 S 7 2 3 S I'NSTR <AS I C /MEMORY TYPES SN54PL333, SN54PL335, SN74PL333, SN74PL335 FIELD-PROGRAMMABLE LOGIC SEQUENCERS D2707r DECEMBER 1982 07 J OR N DUAL-IN-LINE PACKAGE

18n8

Contextual Info: T IB P A D 18N8-6C HIGH-PERFORMANCE PROGRAMMABLE AD D RESS DECODER/NAND ARRAY D 3 0 8 6 , DECEMBER 1 9 8 7 Very High Speed Address Decoder Ideal for Use w ith High Speed Processors I/O Propagation Delay: 6 ns Max • Suitable for High Speed N A ND-NAND Logic

74AC series

Abstract: POM-n
Contextual Info: 9 P R E C A U T IO N S IN D E S IG N IN G C IR C U IT S 9-1 Input Processing 1 Processing of unused gates. Inputs of CMOS IC have such a high im pedance th at the logic level becom es undefined under open conditions. If the input is a t an interm ediate level, the P -channel and N -channel transistors both turn

TC74HC181

Abstract: TC74HC181P IC 74LS181 pin diagram 6p3p
Contextual Info: TC74HC181P TC74HC18 1 P A R ITHMETIC LOGIC UNIT/FUNCTION GENERATOR The TC74HC181 is a high speed CMOS ARITHMETIC LOGIC UNIT ALU /FUNCTION GENERATORS fabricated with silicon gate C^MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining

diode 944 lg

Abstract: B301A ga331 LT 943 diode 945 lg
Contextual Info: SCRs GA300 GA300A GA301 GA301A Commercial Nanosecond Switching Planar GB300 GB300A GB301 GB301A FEA TU RES DESCRIPTION • • • • • Unitrode’s Nanosecond Thyristor Switch combines the turn-on speed of logic level transistors with the high current switching capability inherent in SCRs. With this