74AS Search Results

IC-524

Abstract: 74as
Contextual Info: SN 54AS881A, S N 74AS 8 8 1A ARITH M ETIC LOGIC UNITS/FUNCTION G ENERATORS D 2 6 6 1 , DECEMBER 1 9 8 2 - • Package Options Include Plastic "Small Outline" Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs •

74AS2645

Abstract: 74AS2640
Contextual Info: SN 54AS2640, SN 54AS2645 SN 74AS2640, SN 74AS2645 OCTAL BUS TRANSCEIVER/MOS DRIVER D E C E M B E R 1 9 8 3 - R E V iS E D M A Y B id irectiona l O cta l Bus T ransce ive rs For D riving M O S D evices 1986 SN 54A S ' . . . J PACKAGE SN 74A S ' . . . DW or N PACKAGE

74AS282

Contextual Info: PRODUCT PREVIEW SN54AS282, SN 74AS282 LOOK AHEAD CARRY GENERATOR WITH SELECTABLE CARRY INPUTS D 2 8 1 1 , D EC EM BE R 1 9 8 3 - R E V iS E D M A Y 1 9 8 6 S N 54A S 282 . . . J PACKAGE S N 74A S 282 . . . D W O H N PACKAGE Selectable Carry Inputs Version of the

74AS131

Abstract: H 349
Contextual Info: DM54AS131/74AS131 National JutSemiconductor 74AS131 3-to-8 Line Decoders/Demultiplexers with Address Registers General Description Features The DM54/74AS131 is a 3-to-8 line decoder/dem ultiplexer with registers on the three address inputs. When the clock

DM74AS805B

Contextual Info: DM 54AS805B/ D M 74AS805B NATIONAL SEMICOND { L O G I C ? bl b S D 1 1 2 E □□SlflGl 1 6501122 NATIONAL SEMICONDUCTOR -61C 51801 D National Semiconductor DM54AS805B/74AS805B Hex 2-Input NOR Drivers General Description Absolute Maxim um Ratings Note 1

Contextual Info: SN54ALS168B, SN54ALS169B, SN54AS168, SN54AS169 S N 74 A LS 16 8 B , S N 74 A LS 16 9 B , S N 74 A S 16 8 , S N 74AS16 9 SYNCHRONOUS 4-BIT UP/DOWN DECADE A N D BINARY COUNTERS M AR C H 1 9 8 4 - • • I Fully Synchronous Operation for Counting and Programming

74AS244P

Contextual Info: a xi MITSUBISHI ASTTLs M 74AS244P ' OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT NONINVERTED DESCRIPTION The M 7 4 A S 2 4 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it co n s is tin g of tw o b lo c k s of b u ffe rs w ith 3 -s ta te n o n in ­

16-LIN

Contextual Info: a >i MITSUBISHI ASTTLs M 74AS13SP 3-LINE TO 8-LINE DECODER/DEMULTIPLEX ER DESCRIPTION T h e M 7 4 A S 1 3 8 P is a s e m ic o n d u c to r in te g ra te d c irc u it of a 3 - lin e - to - 8 - lin e d e c o d e r /d e m u ltip le x e r w ith PIN CONFIGURATION TOP VIEW

Contextual Info: MITSUBISHI - - - Í D G T iT L O G I C } "il D È I ^24^027 DG12S71 □ ¥ MI T S UB I S H I — ASTTLs M 74AS1808P 91D 12 271 t ò ^ pa's<re 7~ ~93-/S D HEX 2-1NPUT AND DRIVER DESCRIPTION The 74AS1808P is a semiconductor integrated circuit consisting of six 2-input positive-logic AND buffer gates,

Contextual Info: MITSUB IS HI -CD6TL LOGIC} Il 91D D È I bSMTflS? ODlBEhñ □ 12 2 6 8 D >00^ ?^ u MITSUBISHI ASTTLs M 74AS1804P ~ 7^Y3'/S HEX 2-IN PU T NAND DRIVER DESCRIPTION The 74AS1804P is a semiconductor integrated circuit consisting of six 2-input positive-logic NAND buffer

SN54AS352

Abstract: ALS352 AS153 SN54ALS352 SN74ALS352
Contextual Info: SN 54ALS352, SN 54AS352, SN 74ALS352, SN 74AS352 DUAL 4 LINE TO 1 LINE DATA SELECTORS/MULTIPLEXERS D 2 6 6 1 , A P R IL 1 9 8 2 - f t E V I S E D M A Y 1 9 8 6 S N 5 4 A L S 3 5 2 , S IM 54 A S 3 52 . . . J PACKAGE S N 7 4 A L S 3 5 2 , S N 7 4 A S 3 5 2 . . . D OR N PACKAGE

SN54AS182

Abstract: AS181B 13hcn SAN.M06.NLC.5NZ
Contextual Info: C PRODUCT PREVIEW t V -3 SN 54AS182, SN 74AS182 LOOK AHEAD CARRY GENERATOR D 2 6 6 1 , D E C E M B E R 1 9 8 3 - R E V IS E D M A Y 1 9 8 6 • H ig h -S p e e d R e p la c e m e n t f o r th e 'S 1 8 2 • O ffe rs C a rry F u n c tio n s in a C o m p a tib le

IMPLEMENTATION of 4-BIT LEFT SHIFT BARREL SHIFTER

Abstract: IY15 lzn4 SN74AS897 TRANSISTOR BC 416b 18 x 16 barrel shifter 4 bit barrel shifter circuit 16 bit barrel shifter circuit diagram Y1018 16 BIT SHIFT REGISTER
Contextual Info: SNS4AS897A. 74AS897A 16-BIT PARALLELjSERIAL BARREL SHIFTERS D 2 8 8 5 , O C TO BE R 1 9 8 5 - R E V IS E D M A R C H 1 9 8 6 SN 54A S 897A . SN 74AS897A GB P IN-G RID A R R A Y P AC KA G E • High-Speed "Flash" Shift Operations • Expandable to 3 2 Bits

AS1881

Abstract: p606 SN54AS882A SN74AS882A SN74AS882 cg76
Contextual Info: SN54AS882A, SN 74AS882A 32 BIT LOOK AHEAD CARRY GENERATORS 0 2 6 6 1 , DECEM BER 1 9 8 2 R E V IS E D N O V E M B E R 1 9 8 5 SN 54A S882A . JT PACKAGE SN 74A S882A . DW OR NT PACKAGE Directly Compatible w ith 'A S 181B , ’A S 1 1 8 1 , A S 881B , and A S 1881 ALUs

Contextual Info: MITSUBISHI -CDGTL LOGIC} 6249827 MITSUBISHI <DGTL LOGIC 9 1 D 12236 D D E I bEMTflS? 001253b T i~~ • MITSUBISHI ASTTLs M 74AS623P T -S T 3 -3 t SO!"' pa'31" “ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT NONINVERTED) DESCRIPTION The 74AS623P is a semiconductor integrated circuit

Contextual Info: MITSUBI SHI -CDGTL LOGIC} o ¿ 4 y ÖZ 7 M I T S U B I S H I DGTL L O GI C -tW 9 1 D 12233 D C X LEMMAS? 0015233 M IT S U B IS H I ASTTLs M 74AS620P \ ^ T * * - 3 / • OCTAL BUS TRANSCEIVER W IT H 3-STA TE O UTPUT (IN V E R T E D ) '& * * * DESCRIPTION

Contextual Info: M I T S U B I S H I -CDGTL L O GI C} =11 6 2 4 9 8 2 7 M I T S U B I S H I D G T L L O G I C Q >/ 9 1D 12 182 De J bEMTÖS? GOlSlflS 1 MITSUBISHI ASTTLs M 74AS20P T 'V 3 DUAL 4 -INPUT POSITIVE NAND GATE DESCRIPTION Th e PIN CONFIGURATION (TOP VIEW) M 7 4A S 2 0P is a sem iconductor integrated circuit

Contextual Info: I • M I T S U B I S H I -CDGTL L O GI C} Tl 6 2 4 9 8 2 7 M I T S U B I S H I <DGTL L O G I C 910 12198 ° D eT | b E 4 ciñ57 'DD12nfl S | ~ MITSUBISHI A S T T Ls M 74AS158P r % £ * « * * * T-6.6-21-5-1 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER INVERTED)

74AS821

Abstract: N74AS
Contextual Info: SN54AS821, SN54ASB22, 74AS821, 74AS822 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS D2825, DECEMBER 1983-REVISED JANUARY 1986 Functionally Equivalent to AMD's AM 29821 and A M 29822 SN54AS821 . . . JT PACKAGE SN 74AS821 . . . DW OR NT PACKAGE TOP VIEWI

Contextual Info: p o n m ir T SN 54A S632, SN 5 4 A S6 3 4 PRFVIFW 74AS632, SN 74AS634 32-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS D 2 6 6 1 , JAN U A R Y 1986 • D etects and Corrects Single-Bit Errors • D etects and Flags Dual-Bit Errors • Built-In Diagnostic Capability

mpc 1723

Abstract: stk ic 5.1 circuit diagram 74AS890 mpc+1723
Contextual Info: TEXAS INSTR -CL0GIC3- 77 DE 0^1723 003^30 û T 'S Z - 't t - O S SN54AS890, 74AS890 MICROSEQUENCERS D 2 6 6 2 , NOVEM BER 1 9 8 2 -R E V IS E D A PRIL 1986 14 Bits Wide—Addresses up to 16,384 Words of Microcode with One Chip SN 74AS890 . . . GB PACKAGE

74als871

Abstract: 74AS870 74ALS870 74as871 2A3J
Contextual Info: SN54ALS870, SN54AS870, SN 5 4ALS 8 71, SN54AS871 S N 74 ALS 870, 74AS870, S N 7 4 A L S 8 7 1 , SN 74AS 8 71 DUAL 16-BY-4 REGISTER FILES D 2 6 6 1 , DECEMBER 1 9 8 2 - REVISED M A Y 1 9 8 6 S N 5 4 A L S 8 7 0 , S N 5 4 A S 8 7 0 . . . J T PACKAGE S N 7 4 A L S 8 7 0 , S N 7 4 A S 8 7 0 . . . D W OR N T PACKAGE

74AS13

Abstract: ls 138 74AS138 LS138 SN54ALS138
Contextual Info: SN74ALS138, SN 74AS13«, SN54ALS138, SN54AS138 3-LINE TO B-LINE DECODERS/DEMULTIPLEXERS 02661, APRIL 1982 - REVISED MAY 1986 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems S N 5 4A LS 138, S N 6 4A S 1 38 . . J PACKAGE S N 74A LS 138, S N 7 4A S 1 38

74ALS533

Abstract: 74AS533
Contextual Info: TEXAS INSTR LOGIC a^biTai Daa3sfis s 2SE D SN54ALS533, SNS4ASS33, SN74ALS533, 74AS533 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D266T, APHIL 1982 - REVISED MAY 1986 SN 54ALS533. SN 54ASS33 . . . J PACKAGE S N 74A LS533, SN 74AS533 . . . DW OR N PACKAGE