KVT22 Search Results

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”

KVT22

Abstract: KR22 MC100LVELT22
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

KVT22

Abstract: KR22 MC100LVELT22 MC100LVELT22D MC100LVELT22DR2
Contextual Info: MC100LVELT22 3.3VĄDual LVTTL/LVCMOS to Differential LVPECL Translator The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

KLT20

Abstract: k1648 klt22 KEL32 MC100 HEP64 KLT21 LP17 KEP32 HEP139
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description Features • • • • • • • 350 ps Typical Propagation Delay <100 ps Output−to−Output Skew Flow Through Pinouts The 100 Series Contains Temperature Compensation

kvt22

Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of

KR22

Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description Features • • • • • • • 350 ps Typical Propagation Delay <100 ps Output−to−Output Skew Flow Through Pinouts The 100 Series Contains Temperature Compensation

Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

KVT22

Abstract: KR22 MC100LVELT22 948R
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

AND8090

Abstract: kvt22 KR22 MC100LVELT22 MC100LVELT22D MC100LVELT22DR2 MC100LVELT22DT MC100LVELT22DTR2
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

kvt22

Abstract: BD 140 transistor KR22 MC100LVELT22
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

kvt22

Abstract: transistor BD 540 MC100EL35 MC100EP52 MC10EP31 MC100EP35 MC10EP01 MC100EP31 MC10EPT20
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline

KVT22

Abstract: marking code E2 logic gate EP MARKING CODE SOIC 8 DFN8 KR22 MC100LVELT22
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description Features • • • • • • • 350 ps Typical Propagation Delay <100 ps Output−to−Output Skew Flow Through Pinouts The 100 Series Contains Temperature Compensation

KVT22

Abstract: kr22 MO-187 100LVELT22 100LVELT22M 100LVELT22M8 M08A
Contextual Info: Revised January 2003 100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator General Description Features The 100LVELT22 is a LVTTL/LVCMOS to differential LVPECL translator operating from a single +3.3V supply. • Typical propagation delay of 350 ps

kvt22

Abstract: KR22 MC100LVELT22
Contextual Info: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline