948R Search Results

KEP16

Abstract: LVEL16 MC100EP16 MC10EP16
Contextual Info: MC10EP16, MC100EP16 3.3V / 5V ECL Differential Receiver/Driver Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 8 1 Features TSSOP−8 DT SUFFIX CASE 948R • 220 ps Typical Propagation Delay • Maximum Frequency > 4 GHz Typical

ic 4075 datasheet

Abstract: m 1305 KEP66 MC100EP16VC
Contextual Info: MC100EP16VC 3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output Description http://onsemi.com MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 1 TSSOP−8 DT SUFFIX CASE 948R 8 KEP66 ALYW G 1 8 8 1 KP66 ALYWG G DFN8 MN SUFFIX CASE 506AA

KEP66

Abstract: m 1305 MC100EP16VC TRANSISTOR 751
Contextual Info: MC100EP16VC 3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output Description http://onsemi.com MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 1 TSSOP−8 DT SUFFIX CASE 948R 8 KEP66 ALYW G 1 8 8 1 KP66 ALYWG G DFN8 MN SUFFIX

HVP16

Abstract: KVP16 LVEL16 MC100LVEP16 MC10LVEP16 2015 soic8
Contextual Info: MC10LVEP16, MC100LVEP16 2.5V / 3.3V ECL Differential Receiver/Driver Description MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 8 1 TSSOP−8 DT SUFFIX CASE 948R • 240 ps Propagation Delay • Maximum Frequency > 4 GHz Typical • PECL Mode Operating Range: VCC = 2.375 V to 3.8 V

Contextual Info: MC100EP16VC 3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output Description http://onsemi.com MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 1 TSSOP−8 DT SUFFIX CASE 948R 8 KEP66 ALYW G 1 8 8 1 KP66 ALYWG G DFN8 MN SUFFIX

Contextual Info: MC100EP16VT 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing and Internal Input Termination http://onsemi.com Description • • • • 8 8 KEP63 ALYW G 1 SOIC−8 D SUFFIX CASE 751 1 8 8 1 TSSOP−8 DT SUFFIX CASE 948R 1 KP63 ALYWG

KEP66

Abstract: MC100EP16VC
Contextual Info: MC100EP16VC 3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output Description http://onsemi.com MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 1 TSSOP−8 DT SUFFIX CASE 948R 8 KEP66 ALYW G 1 8 8 1 KP66 ALYWG G DFN8 MN SUFFIX CASE 506AA

KPT26

Abstract: MC100EPT26
Contextual Info: MC100EPT26 3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 8 1.4 ns Typical Propagation Delay Maximum Frequency > 275 MHz Typical 1 TSSOP−8 DT SUFFIX CASE 948R The 100 Series Contains Temperature Compensation

HVP16

Abstract: KVP16 LVEL16 MC100LVEP16 MC10LVEP16 marking code 5y
Contextual Info: MC10LVEP16, MC100LVEP16 2.5V / 3.3V ECL Differential Receiver/Driver Description MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 8 1 8 HVP16 AYWWXG G 8 1 Features TSSOP−8 DT SUFFIX CASE 948R • 240 ps Propagation Delay • Maximum Frequency > 4 GHz Typical

HVP16

Abstract: KVP16 LVEL16 MC100LVEP16 MC10LVEP16
Contextual Info: MC10LVEP16, MC100LVEP16 2.5V / 3.3V ECL Differential Receiver/Driver Description MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 8 1 TSSOP−8 DT SUFFIX CASE 948R • 240 ps Propagation Delay • Maximum Frequency > 4 GHz Typical • PECL Mode Operating Range: VCC = 2.375 V to 3.8 V

Contextual Info: MC10ELT25, MC100ELT25 -5 V Differential ECL to TTL Translator Description Features • • • MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 1 TSSOP−8 DT SUFFIX CASE 948R 1 KLT25 ALYW G 1 8 8 2.6 ns Typical Propagation Delay 100 MHz FMAX CLK 24 mA TTL Outputs

detail

Abstract: 948R 948R-02
Contextual Info: MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP 8 CASE 948R–02 ISSUE A DATE 04/07/2000 SCALE 2:1 8x 0.15 0.006 T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER.

KPT25

Abstract: EPT25 MC100EPT25 MC100EPT25D MC100EPT25DR2 MC100EPT25DT MC100EPT25DTR2 KA25 kpt25 alyw
Contextual Info: MC100EPT25 −3.3V / −5V Differential ECL to +3.3V LVTTL Translator The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, -3.3 V to -5.2 V, and ground. The small outline 8-lead package and the single gate of the EPT25 make it ideal

KVT23

Abstract: MC100LVELT23 MC100LVELT23D MC100LVELT23DR2 MC100LVELT23DT
Contextual Info: MC100LVELT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100LVELT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which

KEL04

Abstract: HL04 HEL04 e104 MC100EL04 MC10EL04 HL-04
Contextual Info: MC10EL04, MC100EL04 5VĄECL 2ĆInput AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those

KEP05

Abstract: HEP05 MC100EP05 MC10EP05
Contextual Info: MC10EP05, MC100EP05 3.3V / 5VĄECL 2-Input Differential AND/NAND The MC10/100EP05 is a 2–input differential AND/NAND gate. The device is functionally equivalent to the EL05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP05 is ideal for applications requiring the fastest AC performance

KVL11

Abstract: KV11 LVEL11 MC100LVEL11
Contextual Info: MC100LVEL11 3.3V ECL 1:2 Differential Fanout Buffer Description The MC100LVEL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times

KV05

Abstract: KVL05 MC100EL05 MC100LVEL05 MC100LVEL05MNR4G
Contextual Info: MC100LVEL05 3.3V ECL 2-Input Differential AND/NAND Description The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally

2824 footprint dimension

Abstract: MC10EP89 HEP89 HP89 MC10EP89-D 964 dfn8
Contextual Info: MC10EP89 3.3V / 5V ECL Coaxial Cable Driver Description The MC10EP89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in digital video broadcasting applications; for this application, since the system is

MC100EP35

Abstract: EL35 HP35 KP35 MC10EP35 code KP35
Contextual Info: MC10EP35, MC100EP35 3.3V / 5V ECL JK Flip−Flop Description The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip−flop. The J/K data enters the master portion of the flip−flop when the clock is LOW and is transferred to the slave, and

KVL51

Abstract: MC100LVEL51 transistor marking PB
Contextual Info: MC100LVEL51 3.3V ECL Differential Clock D Flip-Flop Description The MC100LVEL51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 device, but operates from a 3.3 V supply. With propagation delays and output transition times

HEP58

Abstract: MC100EP58 MC10EP58
Contextual Info: MC10EP58, MC100EP58 3.3V / 5VĄECL 2:1 Multiplexer The MC10/100EP58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the EL58 and LVEL58 devices. The 100 Series contains temperature compensation. • 310 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical

KEL07

Abstract: HL-07 E107 MC100EL07 MC10EL07 hl07 IC HEL07
Contextual Info: MC10EL07, MC100EL07 5VĄECL 2ĆInput XOR/XNOR The MC10EL/100EL07 is a 2-input XOR/XNOR gate. The device is functionally equivalent to the E107 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E107, the EL07 is ideally suited for those

EL12

Abstract: MC100LVEL12 MC100LVEL12D
Contextual Info: MC100LVEL12 3.3VĄECL Low Impedance Driver The MC100LVEL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive applications such as memory addressing. The device is functionally equivalent to the EL12 device and operates from a 3.3 V power supply.