E142 wafer format
Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001 SCILLC, 2001 Previous Edition 2000 “All Rights Reserved”
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HLT24
Abstract: MC100ELT24DG ELT24 HT24 KLT24 MC100ELT24 MC10ELT24 MC100ELT24DR2G
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 Features • • • • • 0.8 ns tPHL, 0.95 ns tPLH Typical Propagation Delay PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V; VEE = −4.2 V to −5.5 V with
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KLT20
Abstract: k1648 klt22 KEL32 MC100 HEP64 KLT21 LP17 KEP32 HEP139
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and
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kvt22
Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of
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and8002/d12mon00232dr14525kvt22+9kvl11kpt23on semiconductor markingk1648klt20hel16kel32kel01xaa9646
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HLT24
Abstract: KLT24
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, −5.2 V or −4.5 V and ground are required. The small outline 8−lead package and the single gate of
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KLT24
Abstract: ELT24 HLT24 HT24 MC100 MC100ELT24 MC10ELT24
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, -5.2 V or -4.5 V and ground are required. The small outline 8-lead package and the single gate of the
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KLT24
Abstract: MC100ELT24 HLT24 ELT24 HT24 MC100 MC10ELT24
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, −5.2 V or −4.5 V and ground are required. The small outline 8−lead package and the single gate of
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KLT24
Abstract: ELT24 HLT24 HT24 MC100ELT24 MC10ELT24 MC100ELT24DG
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 Features • • • • • 0.8 ns tPHL, 0.95 ns tPLH Typical Propagation Delay PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V; VEE = −4.2 V to −5.5 V with
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HLT24
Abstract: KLT24 ELT24 MC100ELT24 HT24 MC10ELT24
Contextual Info: MC10ELT24, MC100ELT24 5VĄTTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5V, -5.2V or -4.5V and ground are required. The small outline 8-lead package and the single gate of the
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MC100ELT24
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, −5.2 V or −4.5 V and ground are required. The small outline 8−lead package and the single gate of
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KLT24
Abstract: HLT24
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, −5.2 V or −4.5 V and ground are required. The small outline 8−lead package and the single gate of
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HEL16
Abstract: DEVICE MARKING CODE table onsemi marking marking code onsemi marking code onsemi Diode kel33 on semiconductor traceability marking soic HEL32 HEL12 HEL31 HEL05
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and
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and8002/dhel16device marking code tableonsemi marking+7marking code onsemimarking code onsemi diodekel33on semiconductor traceability marking soichel32hel12 hel31hel05
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KLT24
Abstract: ELT24 HLT24 HT24 MC100ELT24 MC10ELT24 MC100ELT24DG
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 Features • • • • • 0.8 ns tPHL, 0.95 ns tPLH Typical Propagation Delay PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V; VEE = −4.2 V to −5.5 V with
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KLT24
Abstract: HLT24 KT24 ELT24 KT24ALYW HT24 MC100ELT24 MC10ELT24
Contextual Info: MC10ELT24, MC100ELT24 5VĄTTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5 V, -5.2 V or -4.5 V and ground are required. The small outline 8-lead package and the single gate of the
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