KLT23 Search Results

1310nm DFB BH LASER

Abstract: TO56 package TO56 ball lens cap TOSA DWDM "TO-56 package" Transmitter Optical Sub Assembly 1310nm FP Laser TOSA Monitor PD Capacitance 1 pF
Contextual Info: 1310nm InGaAsP strained MQW DFB LD for 1.25G Ø2.0 TO CAN KLT-231412x Description KLT231412x is long wavelength distributed feedback DFB laser diode(LD) sources in TO-56 package with Ø2mm ball lens cap. KLT231412x consists of an InGaAsP strained multi-quantum well(MQW) LD and an InGaAs PIN-PD for output

TO56 ball lens cap

Abstract: 1310nm DFB BH LASER TO56 aspherical lens cap KLT23 TO can DFB CATV tosa 5mw Aspheric Lens TO Can TO56 package Transmitter Optical Sub Assembly 1310nm FP Laser TOSA
Contextual Info: 1310nm InGaAsP strained MQW DFB-LD KLT231544x, 2.5G DFB LD TO CAN Description KLT-231544x is long wavelength distributed feedback DFB laser diode(LD) sources in TO-56 package with flat window or ball lens or aspherical lens cap. KLT-231544x consists of an InGaAsP strained multi-quantum well(MQW) LD and an InGaAs PIN-PD for output

1310nm DFB BH LASER

Abstract: KLT23 "TO-56 package" tosa 5mw 231444 TO56 package TO56 aspherical lens cap Transmitter Optical Sub Assembly 1310nm FP Laser TOSA Transmitter Optical Sub Assembly 1310nm FP Laser TOSA Monitor PD Capacitance 1 pF
Contextual Info: 1310nm InGaAsP strained MQW 1.25Gbps DFB LD TO CAN KLT-231444x Description KLT-231444x is long wavelength distributed feedback DFB laser diode(LD) sources in TO-56 package with flat window or ball lens or aspherical lens cap. KLT-231444x consists of an InGaAsP strained multi-quantum well(MQW) LD and an InGaAs PIN-PD for output

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”

KLT23

Abstract: MC100ELT23 MC100ELT23D MC100ELT23DR2 MC100ELT23DT MC100ELT23DTR2
Contextual Info: MC100ELT23 5V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

KLT20

Abstract: k1648 klt22 KEL32 MC100 HEP64 KLT21 LP17 KEP32 HEP139
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

KLT23

Abstract: MC100ELT23
Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation

KLT23

Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

kvt22

Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of

Contextual Info: MC100ELT23 5V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

KLT23

Abstract: an1404 MC100ELT23 MC100ELT23D MC100ELT23DR2
Contextual Info: MC100ELT23 5VĄDual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the

KLT23

Contextual Info: MC100ELT23 5V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

KLT23

Abstract: MC100ELT23DR2 MC100ELT23 MC100ELT23D
Contextual Info: MC100ELT23 5VĄDual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the

KLT23

Abstract: marking code onsemi Z Diode MC100ELT23
Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation

Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation

HEL16

Abstract: DEVICE MARKING CODE table onsemi marking marking code onsemi marking code onsemi Diode kel33 on semiconductor traceability marking soic HEL32 HEL12 HEL31 HEL05
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

KLT23

Abstract: 100ELT23 100ELT23M 100ELT23M8 M08A MO-187
Contextual Info: Preliminary Revised September 2002 100ELT23 5V Dual Differential PECL to TTL Translator Preliminary General Description Features The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. • Typical propagation delay of 3.5 ns

PIN diode SPICE model

Abstract: KLT23 Dual-Gate MC100ELT23 MC100ELT23D MC100ELT23DR2 MC100ELT23DT MC100ELT23DTR2
Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

KLT23

Abstract: IC SOCKET soic8 MC100ELT23DR2 MC100ELT23 dimension SOIC8 package *3525* soic8 MC100ELT23DG
Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description MARKING DIAGRAMS* 8 8 1 Features • • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation

KLT23

Contextual Info: MC100ELT23 5V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the

Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation