IPIF Search Results

Xuint32

Abstract: IPIF XAPP967 ML403 X967 vhdl code for 4 channel dma controller
Contextual Info: Application Note: Embedded Processing Creating an OPB IPIF-based IP and Using it in EDK R XAPP967 v1.1 February 26, 2007 Abstract Author: Mounir Maaref Adding custom logic to an embedded design targeting the Xilinx FPGA can be achieved using different methods and techniques. This application note focuses on using the EDK OPB IPIF

XILINX ipic

Abstract: DS448 DS413 SGDA UPC 2502 DS415 P116-P118 Edd 44 P127 PPC405
Contextual Info: PLB IPIF v2.02a DS448 April 15, 2005 Product Specification Introduction LogiCORE Facts The PLB IPIF is a continuation of the Xilinx family of IBM CoreConnect™ compatible LogiCORE products. It provides a bi-directional interface between a User IP core and the

XILINX ipic

Abstract: DS414 DS413 IPIF SLV64 V301C fifo generator xilinx spartan chip select
Contextual Info: OPB IPIF v3.01c DS414 December 2, 2005 Product Specification Introduction LogiCORE Facts The OPB IPIF is a continuation of the Xilinx family of IBM CoreConnect compatible LogiCORE™ products. It provides a bidirectional interface between a user IP core and

IBM processor

Abstract: PPC405 XILINX ipic 2VP7FF896-6 fpga frame buffer vhdl examples
Contextual Info: RapidIO Processor Buffer DS241 v1.0 December 20, 2002 Interface Specification Introduction LogiCORE Facts The RapidIO Processor Buffer provides an interface between the Xilinx Processor Local Bus—Intellectual Property Interface (PLB-IPIF) and the Xilinx 8-bit LP/LVDS

DS437

Abstract: 0X00 PCI64 REQ64
Contextual Info: OPB IPIF/LogiCore V3 PCI Core Bridge DS437 v1.2 July 30, 2002 Summary This document provides the design specification for the bridge between the OPB IPIF and the LogiCORE PCI64 Interface v3.0 core. Only 33/66 MHz, 32-bit PCI buses are supported at this time.

IPIF

Contextual Info: LogiCORE IP Interrupt Control v2.01a DS516 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Interrupt Control service provides interrupt capture support for internal IPIF sub-block, as well as support for the connected IP function.

XC6SLX45-2FGG484

Abstract: SPARTAN 6 xc6slx45 SLV64 spartan-6 XC6SLX45 DS765 XILINX ipic kintex 7 XC7K410TFFG676-3
Contextual Info: LogiCORE IP AXI4-Lite IPIF v1.01.a DS765 January 18, 2012 Product Specification Introduction LogiCORE IP Facts Table The AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of Advanced RISC Machine (ARM ) Advanced Microcontroller Bus Architecture (AMBA®) Advanced

Contextual Info: Alle Buhle wbehallen/ 411 tijtls tts m ti 27,9t ,27 3,81 M CVI - ] CT> 1. t * t I t M f e t I t f * Kontakt ist contact — 1er con t o e t 4.1 V lt > ln IAJ o GO A t 0,55 2,54 7x2,54=117,78] 3 09185167322 4,5 * H Oiiensions in • Original Size O il A 09185166322

Contextual Info: ^ EXUKDTT [PIRilMlG inte* 87C196KT/87C196KS 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER Automotive —40°C to + 125°C Ambient High Performance CHMOS 16-Bit CPU Up to 32 Kbytes of On-Chip EPROM Up to 1 Kbyte of On-Chip Register RAM Up to 512 Bytes of Additional RAM

intel e28f

Abstract: 28f400 BYTE PROGRAM
Contextual Info: [p[M3 [G>U T [P^lWOIl in te l 4-MBIT 256K x 16, 512K x 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F400BV-T/B, 28F004BV-T/B, 28F400CV-T/B Intel Sm artVoltage Technology — 5V or 12V Pro g ram /E rase — 3.3V or 5V Read O peration — 60% Faster Typical Program m ing at

AMBA AXI4 verilog code

Abstract: ZYNQ-7000 BFM 20/ZYNQ-7000 BFM
Contextual Info: LogiCORE IP AXI Bus Functional Models v3.00.a DS824 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Xilinx LogiCORE IP AXI Bus Functional Models (BFMs), developed for Xilinx by Cadence Design Systems, support the simulation of

hdk POTENTIOMETER

Contextual Info: Freescale Semiconductor Release Notes Document Number: MQXRN Rev. 26, 08/2013 Freescale MQX RTOS 4.0.2 Release Notes PRODUCT: Freescale MQX™ RTOS PRODUCT VERSION: 4.0.2 DESCRIPTION: Freescale MQX™ RTOS, version 4.0.2 RELEASE DATE: August, 2013 2013 Freescale Semiconductor, Inc. All rights reserved.

IBM Processor Local Bus PLB 64-Bit Architecture

Abstract: data sheet DS400 DS400
Contextual Info: Processor Local Bus PLB v3.4 (v1.02a) DS400 April 24, 2009 Product Specification Introduction LogiCORE IP Facts The Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only

input 220v and output 4v

Abstract: optron AT10N 220Vc
Contextual Info: POTENTIOMETER ISOLATED TRANSMITTER 7 S4-PT SERIES FEATURES • Accuracy ± 0.1 % RO. ■ Input p o te n tio m e te r tota resistance 5 0 Q ~ 10KQ 0 — 1 0 0 % Steady voltage, current and low ripple ou tpu t ■ Plug-in typ e M □ MODEL: S4 - PT - NO.

AS263

Abstract: 271066 l213d
Contextual Info: INTEL CORP UP/PRPHLS ' EQE |) • 4fi2bl7S OOfilSS? T ■ ¡ n y * M28F256 n?4(eHV2.7 256K (32K x 8) CMOS FLASH MEMORY M ilitary a Flash Electrical Chip-Erase ■ Command Register Architecture for Microprocessor/Microcontroller Compatible Write Interface

ISO 11898-1

Abstract: bosch can 2.0B Spartan-3an DSP/VIRTEX ACFB
Contextual Info: CAN v1.5 DS265 August 8, 2007 Product Specification Introduction LogiCORE Facts The LogiCORE Controller Area Network CAN product specification describes the architecture and features of the Xilinx CAN controller core and the functionality of the various registers in the design. In

intel 80c196 INSTRUCTION SET

Abstract: intel 80c196 opcode sheet intel 8096 assembly language 1NT09 80C196 assembly language 80C196KA 80C196 instruction set Intel 80c196 Packaging Information 270428 0s35
Contextual Info: -ii ^ 7 c Ö R r « i P R C S / P R P HI-> li 482617 5 Í É | 4sat,i75 o a b o s a v m f Í N t É L C 0 R P M Í P R C S / PRPHl V : , . . . ‘ 99D . J . 60527 M O D G » » T - V 7 - / 9-/6 80C196KA 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Full Duplex Serial Port

Contextual Info: I«R in t e r n a t io n a l r e c 4ÖSS4S5 QOIQTIB 3 • t i f i e r " T ~ O l “5 3 163 R77R S E R IE S 2 6 0 0 - 2 0 0 0 V O L T S RANGE 3 8 7 0 AMP AVG H O C K EY PU K D IF F U S E D JU N C T IO N R E C T I F I E R 0 I 0 D E S V O LT A G E PART NUMBER

vhdl source code for i2c optic

Abstract: DS543 microblaze locallink
Contextual Info: MOST Network Interface Controller v1.2 DS543 August 8, 2007 Product Specification Introduction LogiCORE Facts The LogiCORE Media Oriented Systems Transport Network Interface Controller MOST NIC core is a complete controller designed to the MOST Specification

XAPP662

Abstract: PPC405 XAPP138 XAPP660 XAPP661 XC2VP20 FF1152 FF672 Virtex-II Platform FPGA Complete All Four Module verilog code of prbs pattern generator
Contextual Info: Application Note: Virtex-II Pro Family R XAPP662 v1.1 July 3, 2003 Summary In-Circuit Partial Reconfiguration of RocketIO Attributes Author: Vince Eck, Punit Kalra, Rick LeBlanc, and Jim McManus This application note describes in-circuit partial reconfiguration of RocketIO transceiver

vhdl code for ethernet csma cd

Abstract: DS441 00-00-5E-00-FA-CE emac implementation vhdl ethernet xilinx sfd 349 vhdl code CRC 32
Contextual Info: OPB Ethernet Lite Media Access Controller DS441 v1.5 November 7, 2002 Summary Product Specification This document provides the design specification for the 10/100 Mbs OPB Ethernet Lite Media Access Controller (MAC). This document applies to the following peripheral:

TFK 404

Abstract: T1S58 BCI83L Germanium diode OA 182 TFK diode transistors 2n 945 v744 akai amplifier tis62 BCI09
Contextual Info: S IL IC O N T R A N S IS T O R S PN P Fast Switches N PN Fast: Switches D e v ic e B S X 27 T IS 4 4 T IS 45 T IS 46 T IS 47 T IS 48 T IS 49 Page 96 166 168 170 172 172 174 D e v ice Page T I S 51 T IS 52 T IS 55 2N 706A 2N 708 2N 753 2N 914 178 180 185 317

P80A49H

Abstract: 8035HL F1L 250 V fuse BPK-70 interfacing 8275 crt controller with 8086 i8282 hall marking code A04 Transistor AF 138 DK55 82720 intel
Contextual Info: COMPONENT DATA CATALOG JANUARY 1982 Intel C orporation makes no w arranty fo r the use of its products and assumes no re sponsib ility fo r any e rrors w hich may appear in th is docum ent nor does it make a com m itm ent to update the info rm atio n contained herein.

N555N

Abstract: LDR Cds RF221 250M IRF220 IRF221 IRF222 IRF223
Contextual Info: 01 3875081 G E SOLID D E ~ | 3Ö7SDÖ1 STATE Standard Power MOSFETs 0 1E ODlflETT 18279 “ File N u m b e r 1 56 7 Power MOS Field-Effect Transistors N-Channel Enhancement-Mode Power Field-Effect Transistors N -C H A N N EL EN H A N C E M E N T M OD E 4.0A and 5.0A, 150V-200V