IO24 Search Results

Contextual Info: IO43/SD_DAT0 IO44/SD_CMD IO39/SD_DAT3 1 3 5 7 9 IO18 IO22/CAN_RD1 IO36/SPI_MOSI2 IO35/SPI_SCK2 +5V VCC X9 LED_SPEED ETH_TX_DETH_RX_D- 1 3 5 7 9 IO46/AD7 IO7/AD3/AOUT/RXD3 IO24/SPI_MOSI1 IO27/SPI_SCK1 E IO6/AD2/TXD3 IO15 IO25/SPI_MISO1 AOSU Y IO45/AD6 IO8/AD0/TCH_XL

Contextual Info: Laird Technologies Web site: www.LairdTech.com Item # IO2450-SM12, Sphere Infrastructure/In-building Antennas Sphere™ Infrastructure/In-building Antennas • Omnidirectional pattern provides optimal in-building coverage • Ceiling mounted antenna available in 800, 1900, and 2400 MHz frequency ranges

Contextual Info: Laird Technologies Web site: www.LairdTech.com All Categories > Antennas & Reception Solutions > In-Building, CPE, Access Point, and Mobile Client Antennas > In-Building Cellular Antennas > Accessories > Mounting Hardware > Sphere Infrastructure/Inbuilding Antennas > Item # IO2450-RT36

Contextual Info: Model Number: 2.4 GHz Sphere IO2450 Omnidirectional In-Building Antenna Specifications: Element Type Frequency Range Peak Gain Polarization1 Impedance Maximum Input Power VSWR Min. Performance Dimensions (L x W x H) Housing Operating Temperature Storage Temperature

Contextual Info: TMS320VC5502 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS166I April 2001 – Revised January 2006 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not

Contextual Info: TMS320VC5502 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS166H April 2001 – Revised November 2004 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not

V2DA

Abstract: VDIP1
Contextual Info: Future Technology Devices International Ltd. V2DIP1-48 VNC2-48 Development Module Datasheet Document Reference No.: FT_000236 Version 1.0 Issue Date: 2010-04-15 Future Technology Devices International Ltd FTDI Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom

w83977eg

Abstract: w83977ef-aw W83977EG-AW 16450 UART 13SP O16u
Contextual Info: W83977EF-AW /W83977EG-AW NUVOTON ISA I/O W83977EF-AW W83977EG-AW -I - Publication Release Date: January, 2010 Revision 1.5 W83977EF-AW /W83977EG-AW TABLES OF CONTENTS 1. GENERAL DESCRIPTION .1

TMS320

Abstract: TMS320C5000 TMS320VC5501 TMS320VC5502 XDS510 Analog devices catalog 5502 mcbsp
Contextual Info: TMS320VC5502 Fixed-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

RT3PE600L

Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

16C550

Abstract: 82077AA NS16C550
Contextual Info: FDC37B72x 128 Pin Enhanced Super I/O Controller with ACPI Support FEATURES • • • • • • • • • • • • • 5 Volt Operation PC98/99 and ACPI 1.0 Compliant Battery Back-up for Wake-Events ISA Host Interface ISA Plug-and-Play Compatible Register

Contextual Info: Document No.: FT_000061 FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 2.08 Clearance No.: FTDI#77 Future Technology Devices International Ltd FT2232H Dual High Speed USB to Multipurpose UART/FIFO IC The FT2232H is FTDI‟s 5th generation of USB

Advanced Boot Block Flash

Abstract: AES-128 CS201 CS281 CS289 AGLP125
Contextual Info: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

A3P600

Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
Contextual Info: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)

A3PE3000L FG484

Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

QN68

Abstract: VQ100 actel part markings
Contextual Info: Advance v0.4 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process

A3P250

Abstract: A3P060 A3P1000 Datasheet A3P125 IO97RSB2 IO52NDB1 FBGA A3P250 fbga 256 A3P250 ACTEL ACTEL FBGA 144
Contextual Info: Automotive ProASIC3 Packaging 3 – Package Pin Assignments 100-Pin VQFP 100 1 Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

actel vqfp

Abstract: IO87RSB1
Contextual Info: ProASIC3 nano Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at

AFS600-FG256

Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

IO91RSB2

Abstract: Datasheet AGLN060 81-Pin Datasheet AGLN020 AGLN020 IO10RSB0 AGLN010
Contextual Info: IGLOO nano Packaging 3 – Package Pin Assignments 36-Pin UC Pin 1 Pad Corner 6 5 4 3 2 1 A B C D E F Note: This is the bottom view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

729-Pin

Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Contextual Info: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at

TMS320VC5501PGF300

Contextual Info: TMS320VC5501 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS206H December 2002 − Revised November 2004 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: TMS320VC5501 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS206E December 2002 − Revised October 2003 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to

GC5325

Contextual Info: User's Guide SLWU075A – October 2011 – Revised January 2012 TSW3065EVM – Standalone LO Source This document describes the steps to properly operate and understand the TSW3065EVM Evaluation Module. TSW3065EVM eliminates expensive signal generators and also acts as a demo enabler for TI