DRW45 Search Results

IDT82V8313

Abstract: MX12 MX23 mux E1
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 6 September 25, 2009 6024 Silver Creek Valley Road, San Jose, CA 95138 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 284-2775 Printed in U.S.A. 2009 Integrated Device Technology, Inc DISCLAIMER

Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 2 March 15, 2004 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2004 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

diode in40

Abstract: Diode Mark ON B14 Q127 xn13
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767  Total Available Memory = 5,242,880 bits

CLK12

Abstract: IDT82V8313 MX12 MX23 GR 733 512 CJ3
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 1 December 15, 2003 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2003 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51749  Total Available Memory = 1,179,648 bits

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51339  Total Available Memory = 589,824 bits

TAA 611 T12

Abstract: x48 chipset IDT72T6360 IDT72T6480 D25N3
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

XN07

Abstract: Q127 wd2m
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767 ⎯ Total Available Memory = 5,242,880 bits

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51339  Total Available Memory = 589,824 bits

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Diode Mark ON B14

Abstract: Q127 T6714
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits FEATURES • • • • • • • • • • Choose from among the following memory density options: IDT72P51749  Total Available Memory = 1,179,648 bits

TAA 611 T12

Abstract: 72T6480 BA1-B11 d25n3 BA0-C11 k4h561638f A11-C10 q35t Q35T1 A7D9
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

72T6480

Abstract: dsc-6358 IDT72T6360 IDT72T6480 D2312
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 32 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51539  Total Available Memory = 589,824 bits

IDT72T6360

Abstract: IDT72T6480 2x16Mb
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

CLK12

Abstract: IDT82V8313 MX12 MX23
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 3 June 3, 2004 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2004 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

72T63

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

CLK12

Abstract: IDT82V8313 MX12 MX23 HDB3 AMI ENCODER DECODER TR-NWT-000233
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version March 14, 2003 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2003 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: ADVANCE INFORMATION 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options:

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits FEATURES • • • • • • • • • • Choose from among the following memory density options: IDT72P51339  Total Available Memory = 589,824 bits

72T63

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Diode Mark ON B14

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 32 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits FEATURES • • • • • • • • • • Choose from among the following memory density options: IDT72P51539  Total Available Memory = 589,824 bits

ALi m 3329

Contextual Info: 1 ABR SAR Overview The IDT77252 ABR SAR PCI ATM Controller is a member of IDT's family of products for Asynchronous Transfer Mode ATM networks. The ABR SAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassembly (SAR) function and the ATM layer