DQ11C Search Results

M29F800A3BT12

Abstract: m29f800a3br 29F800A
Contextual Info: Order this document by M29F800A3/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA M29F800A3 M29F800A2 8M CMOS Flash Memory Organization: 524,288 words x 16 bits 1,048,576 words x 8 bits Power Supply Voltage: V q c = 3.3 V ± 0.3 V Access Time: M29F800A3—80 = 80 ns Max

DQ620

Contextual Info: VS864648041.VS1664648041B 8M,16Mx64-Bit SDRAM Module Preliminary Description The VS864648041B and VS1664648041B are 8Mx64-bit and 16Mx64-bit dual-in-line synchronous dynamic RAM module DIMM . It is mounted with 8/16 pieces of 8MxB synchronous DRAM (VG36648041BT), and each in a standard 54 pin TSOP package. The VS864648041B and VS1664648041B

TAA 611 T12

Abstract: x48 chipset IDT72T6360 IDT72T6480 D25N3
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

ea423

Contextual Info: N E C E LECTRONI CS INC blE ì> m b427525 NEC 0D34317 MC-422000A 32 2,097,152 X 32-Bit Dynamic CMOS RAM Module NEC Electronics Inc. Description Pin Configuration The MC-422000A32 is a fast-page dynamic RAM mod­ ule organized as 2,097,152 words by 32 bits and de­

intel pa28f400

Abstract: intel 28F400 28F400 29053 intel flash A0513 28f400 interface intel 28f800 A76T intel AP-569
Contextual Info: M f ä ilL D G M Ä Ö S Y in le l 4-MBIT (256K x 16, 512K x 8 SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F400BV-T/B, 28F400CV-T/B, 28F004BV-T/B, 28F400CE-T/B, 28F 004B E -T /B Intel Sm artVoltage Technology — 5V or 12V Program /Erase — 2.7V, 3.3V or 5V Read Operation

Contextual Info: i n y 4-MBIT 256K x 16, 512K x 8 SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F400BV-T/B, 28F400CV-T/B, 28F004BV-T/B, 28F400CE-T/B, 28F004BE-T/B • Intel SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation — Increased Programming Throughput

Contextual Info: H Y 6 7 V 1 8 1 1 0 /1 1 1 64K X 18 Bit SYNCHRONOUS CMOS SRAM -HYUNDAI PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst ad­ dress counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a positiveedge triggered clock K .

Contextual Info: V826A64M24SA 64M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MICRODIMM MODULE Features Description • 172 Pin Unbuffered 67,108,864 x 64 bit Organization DDR MICRODIMM Modules ■ Utilizes High Performance 64M x 8 DDR SDRAM in SOC Packages ■ Single +2.5V ± 0.2V Power Supply

Contextual Info: 3D7303 MONOLITHIC TRIPLE FIXED DELAY LINE SERIES 3D7303 delay devices, me. FEATURES PACKAGES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

TAA 611 T12

Abstract: 72T6480 BA1-B11 d25n3 BA0-C11 k4h561638f A11-C10 q35t Q35T1 A7D9
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: irrigl, PRELIMINARY 2-MBIT 128K X 16, 256K X 8 SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F200BV-T/B, 28F200CV-T/B, 28F002BV-T/B Intel SmartVoltage Technology — 5V or 12V Program/Erase — 3.3V or 5V Read Operation — Increased Programming Throughput

Contextual Info: HY6718110/111 HYUNDAI 64K X 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst address counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a

MSC23236C

Abstract: 80BS20
Contextual Info: O K I Semiconductor M SC23236C/CL-XXBS20/PS20 2,097,152-Word x 36-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23236C/CL-xxBS20 / DS20 is a fully decoded 2,097,152-word 36-bit CMOS Dynamic Random Access Memory Module composed of sixteen 4-Mb DRAMs 1M x 4 in SOJ

Contextual Info: A M D £1 Am27X1024 1 Megabit 64 K x 16-Bit CMOS ExpressROM Device DISTINCTIVE CHARACTERISTICS • As an OTP EPROM alternative: ■ ±10% power supply tolerance ■ High noise immunity ■ Low power dissipation — Factory optimized programming — Fully tested and guaranteed

IDT72T6360

Abstract: IDT72T6480 2x16Mb
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

72T63

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

72T63

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

132-6d

Contextual Info: Ftaucr I nform ation SHARP LhesFiæ g^ 16M 2 M x 8 / 1 M x 1 6 Rage Mode Rash Memory FEATURES • High speed page mode read performance - Normal access time 100 ns - Page mode access time 50 ns • Page depth 16 bytes's words • High speed write performance

DQS7-G17

Abstract: BA1-B11 IDT72T6360 IDT72T6480 72T6360 D10-K3 DQS5-B16
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

TAA 611 T12

Abstract: A6C9 128M DDR SDR SDRAM samsung 0 IDT72T6360 IDT72T6480
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

TAA 611 T12

Abstract: 17x18 BA0-C11 DQ51d DQ34-C12
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag