DIN21 Search Results

50-WVDC

Abstract: 50WVDC DIN11 DS90C241 DIN13 DIN23
Contextual Info: DS90C241 SER DINO DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 LVCMOS Parallel Interface < DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 DIN17 DIN18 DIN19 DIN20 DIN21 DIN22 DIN23 VDDPTO VDDPT1 VDDIT VDDL VDDT DOUT+ TCLK GPO 3.3V TPWDNB = System GPO DEN = High (ON)

DIN11

Abstract: DS90UR241
Contextual Info: DS90UR241 SER DINO DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 LVCMOS Parallel Interface < DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 DIN17 DIN18 DIN19 DIN20 DIN21 DIN22 DIN23 3.3V VDD VDD VDD VDD VDD VDD DOUT+ TCLK GPOs if used, or tie High (ON) | >•

TC58NVG1S3ETA00

Abstract: TC58NVG1S3ET TC58NVG1S3 TC58NVG1S3ETA DIN2111
Contextual Info: TC58NVG1S3ETA00 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 2 GBIT 256M x 8 BIT CMOS NAND E PROM DESCRIPTION The TC58NVG1S3E is a single 3.3V 2 Gbit (2,214,592,512 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 2048blocks.

MAX9263

Abstract: MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM
Contextual Info: 19-5644; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A HDCP Gigabit Multimedia Serial Link Serializer/Deserializer The MAX9263/MAX9264 chipset extends Maxim’s gigabit multimedia serial link GMSL technology to include highbandwidth digital content protection (HDCP) encryption

6206a

Abstract: K-Line transceiver w1p 84 st10f2xx sigma asc 333 24 pin K-line ST10F276E W1P 59 st10 Bootstrap st10273e
Contextual Info: ST10F276E 16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM Datasheet − production data Features • ■ ■ ■ ■ ■ Highly performance 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

Contextual Info: > 4M C C DEVICE SPECIFICATION 33 x 32 1.25 G B IT/S D IFF E R E N T IA L CR O SSPO IN T SW ITCH S2028 GENERAL DESCRIPTION FEATURES 33 x 32 differential crosspoint switch Full broadcast switching capability Differential 10K PECL data path Configurable differential output driver

DS90C124

Contextual Info: DS90C241 Serializer and DS90C124 Deserializer Evaluation Kit User’s Manual NSID: SERDES24-35USB Rev 1.5 National Semiconductor Corporation Date: 2/27/2008 Page 1 of 39 Table of Contents TABLE OF CONTENTS . 2

TC58NYG0S3E

Abstract: TC58NYG0S3ETA00 TC58NYG0S
Contextual Info: TC58NYG0S3ETA00 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 1 GBIT 128M x 8 BIT CMOS NAND E PROM DESCRIPTION The TC58NYG0S3E is a single 1.8V 1 Gbit (1,107,296,256 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 1024blocks.

Contextual Info: D S99R 124Q DS99R124Q 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter Texa s In s t r u m e n t s Literature Number: SNLS318C t D S 99R 124Q Sem iconductor 5 - 4 3 M H z 18-bit C o lo r F P D -L in k II to F P D -L in k C o n ve rte r Features

Contextual Info: D S 9 9 R 1 0 5 ,D S 9 9 R 1 0 6 DS99R105/DS99R106 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer Texas INSTRUMENTS Literature Number: SNLS242C £/r Semiconductor D S 9 9 R 1 0 5 /D S 9 9 R 1 06 3 -4 0M H z D C -B alanced 2 4-B it LVD S S e ria lize r and

131-6 bj 025

Contextual Info: D S 9 9 R 1 0 3 ,D S 9 9 R 1 0 4 DS99R103/DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer Te x a s INSTRUMENTS Literature Number: SNLS241C a t i o n a l D S 9 9 R 1 0 3 /D S 9 9 R 1 04 3 -4 0M H z D C -B alanced 2 4-B it LVD S S e ria lize r and

LF48410JI30

Abstract: DIN11 HSP48410 LF48410
Contextual Info: LF48410 LF48410 DEVICES INCORPORATED 1024 x 24-bit Video Histogrammer 1024 x 24-bit Video Histogrammer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 40 MHz Data Input and Computation Rate ❑ 1024 x 24-bit Memory Array ❑ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution

D3318

Abstract: direct pm modulation circuit PDSP16350 PDSP16488A PDSP16510A COS10
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16

Contextual Info: The ARM Processor Family This Data Sheet is one of a series describing the ARM Family of products from GEC Plessey Semiconductors. The table below shows the current range of 32-bit RISC M icroprocessors/M icrocontrollers. GPS Name P ackag e Description 32 bit RISC core with 32 bit address range.

Contextual Info: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.

COS10

Abstract: PDSP16350 PDSP16488A PDSP16510A DIN24 PDSP16256/A
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO DS3711 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16 bit amplitude accuracy, and are synthesised using a 34 bit

Crossbow

Abstract: S 187 S2024B-6 register file DIN31
Contextual Info: DEVICE SPECIFICATION “CROSSBOW” 32 X 32 800 MBIT/S CROSSPOINT SWITCH “CROSSBOW” X 32 800 MBIT/S CROSSPOINT SWITCH BiCMOS PECL 32 CLOCK GENERATOR FEATURES GENERAL DESCRIPTION • Full broadcast switching capability • 32 x 32 crosspoint structure, expandable to 64 x

Contextual Info: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.

st10f276 jtag

Abstract: w1p 59 ST10F276 st10 Bootstrap EF52 transistor w2P w1p 83 W1P 76 transistor LQFP144 ST10
Contextual Info: ST10F276 16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM Features • ■ ■ ■ ■ ■ Highly performant 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

SCSI 100 connector datasheet

Abstract: DIN28 working of 5 pin relay 100 pin scsi 100-pin SCSI female connector n type connector female CB-89200-2 DIN24 relay 5 pin Backup output protect
Contextual Info: DASP-52064 Isolated 32 D/I & 32 D/O Card Features 32 isolated digital inputs for source type 32 interrupt input I/O digital input 32 isolated digital outputs for sink type 2K battery backup RAM for backup nonvolatile data (only for DASP-52064) One programmable timer and interrupt

ADSP-3221

Contextual Info: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point ALU ADSP-3221 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point arithmetic and logic unit ALU . 1.2 Part Number.

max5713

Contextual Info: MAX5713/MAX5714/MAX5715 Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface General Description The MAX5713/MAX5714/MAX5715 4-channel, low-power, 8-/10-/12-bit, voltage-output digital-to-analog converters

MAX5704AUB

Abstract: max5703
Contextual Info: MAX5703/MAX5704/MAX5705 Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output Voltage DACs with Internal Reference and SPI Interface General Description The MAX5703/MAX5704/MAX5705 single-channel, lowpower, 8-/10-/12-bit, voltage-output digital-to-analog

digital video serializer

Abstract: Mini USB 5Pin mini USB B 5pin SERDES01-40USB 50-pin lcd connector pinout panel mount banana jack DIN11 DS99R101 VG-835 cable usb to idc 6 pin
Contextual Info: SERDES Evaluation Kit DS99R101/102 USB Version 0.1 Users Manual SERDES Demonstration Kit User Manual NSID: SERDES01-40USB DS99R101/102 Rev 0.1 National Semiconductor Corporation Date: 5/14/2008 Page 1 of 37 SERDES Evaluation Kit DS99R101/102 USB Version 0.1 Users Manual