DAT18 Search Results

PXB 4325

Abstract: EN16 TQFP-144 DAT-16 DAT16
Contextual Info: ICs for Communications Content Addressable Memory Element CAME PXB 4360 F Version 1.1 Preliminary Data Sheet 10.97 DS 1 PXB 4360 F CONFIDENTIAL Revision History: Previous Version: Page Page in previous (in current Version Version) Current Version: 10.97

diode T35 12H

Abstract: T35 12H ac power adapter for notebook schematic GAL programmer schematic 7313 28 pin automatic water level controller circuit diagram PCnet32 remote control gate sytem bel 187 bel 187 transistor diagram
Contextual Info: PRELIMINARY Am79C965 PCnet -32 Single-Chip 32-Bit Ethernet Controller DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for 486 and Video Electronics Standards Association VESA local buses ■ Supports ISO 8802-3 (IEEE/ANSI 802.3) and Ethernet standards

1F0H-1F7H configuration pio

Abstract: S3 TRIO 64 HT6560A HT6560B DAT00 6560B DD15 LD11 LD12 LD04
Contextual Info: HT6560B Enhanced VL_Bus IDE Controller Features • • • • • • • • Pin-to-pin backward compatible with HT6560A VL_Bus IDE controller IDE interface to 486 and 386 DX/SX local bus VESA VL_Bus rev 1.0 compatible Connects directly to VL_Bus and IDE interface, no extra TTL needed

SH 6770

Contextual Info: 1.0 Product Description 1.1 Overview The B t8 2 l5 is a bidirectional buffer with a 36-bit bidirectional port and 9-bit uni­ directional ports that can be configured to transfer iixed-length cells. Bach direc­ tion can store up to 512 36-bit words. This part, therefore, replaces eight

Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 2 March 15, 2004 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2004 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

CLK12

Abstract: IDT82V8313 MX12 MX23 GR 733 512 CJ3
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 1 December 15, 2003 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2003 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

power generation POWER COMMAND HM 1211

Abstract: POWER COMMAND HM 1211 manual POWER COMMAND HM 1211 PM19 Package D-18 DSP56300 DSP56305 BRF6
Contextual Info: Freescale Semiconductor, Inc. Addendum DSP56305UMAD/D Rev. 1, 11/2002 DSP56305 User’s Manual Addendum Freescale Semiconductor, Inc. CONTENTS 1 Introduction .1 2 Modified Signal Definitions .1 3 Operating Mode Register OMR

K30A transistor

Abstract: POWER COMMAND HM 1211 manual K30A POWER COMMAND HM 1211 power generation POWER COMMAND HM 1211 DSP56301V HM 1211 transistor k30a B-28 DSP56300
Contextual Info: DSP56301 USER’S MANUAL DSP56301UM Rev. 4, November 2005 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations not listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224

lg crt monitor circuit diagram

Abstract: hs 8109 DS-17 SANYO 486dx isa bios pin assignment SP1137 hitachi plasma electronic diagram sharp lm64p DS-18 SANYO Spectrol 157 74 VGA 20 PIN LCD MONITOR CABLE CONNECTION DIAGRAM
Contextual Info: SPC8110 LOCAL BUS LCD/CRT VGA CONTROLLER Technical Manual Issue Date: 04/01/97 Document Office No. X07-GQ-001-01 Copyright 1997 S-MOS Systems Inc. All rights reserved. VDC This document, and any text derived, extracted or transmitted from it, is the sole property of S-MOS Systems Inc. and may not be used, copied,

79c965

Abstract: AMD 79c97* lance
Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C965 PCnet -32 Single-Chip 32-Bit Ethernet Controller DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet con tro ller for 486 and V ideo Electronics Standards Association VESA local buses ■ Supports ISO 8802-3 (IEEE/ANSI 802.3) and

D11010

Abstract: SDCUV6482 D11010KFCS LD11 LD12 MPC8260 MPC947 DIN41612 128 D25-CRCW1206 SDRAM16M
Contextual Info: 12/17/01 Rev 0.1 WITH MPC8266ADS - PCI User’s Manual Board Rev. PROTOTYPE-B Semiconductor Products Sector Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can

60nd02

Abstract: D0798 D05103 50MHZ S2020 S2021 d2059 DAT02 DAT06 DAT04
Contextual Info: DEVICE HIPPI SPECIFICATION SOURCE/DESTINATION INTERFACE CIRCUITS HIPPI SOURCE/DESTINATION INTERFACE CIRCUITS FEATURES S2020/S2021 HIPPI Chipset • Functionally compliant with the ANSI HIPPI standard • 32-Bit data channel • Equivalent single channel rate of 800 Mbits/sec

K30A transistor

Abstract: K30A 1 HP25 731 motorola transistor k30a Nippon capacitors
Contextual Info: DSP56301 User’s Manual 24-Bit Digital Signal Processor DSP56301UM/AD Revision 2.0, August 1999 OnCE and Mfax are trademarks of Motorola, Inc. Intel“ is a registered trademark of the Intel Corporation. All other trademarks are those of their respective owners.

DAT29

Abstract: MCD15 dat18 ADR30 1-5R56 ADR27 Dat21 MBD14 MCD4 DK6554X
Contextual Info: MALE HEADER FOR CONNECTION OF 6554X DAUGHTER CARD PFP CARRIER . VPIA[0.23] MEMORY INTERFACE GVCC MAD[0.15] VPIA[0.23] VESA CONNECTOR MAD[0.15] VPID[0.31] R29 VPID[0.31] AA[0.8] 20K P3 VPIA0 A39 -BE1 A41 -RD 11 -RDYRTN 23 -RD BE1 -RDYRTN CCLK A42 BE2

K30A transistor

Abstract: K30A power generation POWER COMMAND HM 1211 POWER COMMAND HM 1211 manual 1 HP25 POWER COMMAND HM 1211 generator POWER COMMAND HM 1211 aar transistor DSP563XX architecture transistor k30a
Contextual Info: DSP56301 User’s Manual 24-Bit Digital Signal Processor DSP56301UM/AD Revision 3, March 2001 OnCE, DigitalDNA, and the DigitalDNA logo are trademarks of Motorola, Inc. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty,

SLSH-1015

Abstract: DAT-65-292-1 DAT-34-292-10 rcm-637 DAT-36-292-1 DAT-69-292-1 RCM-637-2 DAT-39-292-2 DAT-145-292-1 RCM-330-2
Contextual Info: LABELS INDEX cts • dot matrix printable products • dot matrix printable products BY SIZE Part Number .50؆ .75؆ .80؆ 1.00؆ 1.50؆ 1.90؆ Pieces Per Package , , , , , , , , , , Label Width — 6 or 8 lines per inch DAT-30-292*-1,-10 1,000/10,000

2am SMD

Abstract: DAT16 DAT28
Contextual Info: ICs for Communications Content Addressable Memory Element CAME PXB 4360 F Version 1.1 Data Sheet 07.2000 Version 1.1 3;%  5HYLVLRQ +LVWRU\ &XUUHQW 9HUVLRQ  Previous Version: Preliminary Data Sheet 11.97 DS 2) Page Page Subjects (major changes since last revision)

DAT46

Contextual Info: Preliminary SME5431 PCI-360 SME5434PCI-440 SME5434PCI-480 m icrosystem s March 1999 UltraSPARC -!!/ CPU Module DATA SHEET 360/440/480M H z CPU; 0.25 to 2 MB L2 cache, UPA64S, 66M Hz PCI D e s c r ip t io n The SME5431PCI and SME5434PCI UltraSPARC™-IIi CPU Modules provide high-performance, SPARC v9

S3 TRIO 64

Abstract: HT6560A DD15 LA15 LD01 LD31 HC11111 ld18 DAT02 DAT06
Contextual Info: HT6560A VL_Bus IDE Controller Features • • • • • • VESA VL_Bus rev 1.0 compatible. Connects directly to VL_Bus and IDE interface no extra TTL needed. Supports 16 bits and 32 bits data transfer. Zero wait_state 50MHz operation. Support read pre-fetch, posted write and I/O

BCDAT-9-619

Abstract: BCDAT-9-652 DAT-96-652 DAT-102-619 PS-125-150W SLSH-20375 BT 1610 circuit DAT-47-969 MIL-DTL-23053 PS-187-2W-S
Contextual Info: D O T M AT R I X LASER, INK JET & DOT MATRIX LABELS C ircuit Board and Component Identification B-652 polyimide withstands extremely high temperatures. Ideal for marking the underside of printed circuit boards and for surface-mount applications. Remains legible after contact with

ADR05

Abstract: 50 pins ide connector S3 TRIO 64 1F0H-1F7H ADR30 vl-bus ide controller DAT12 LD31 ADR27
Contextual Info: HT — 6560A VL_BUS IDE CONTROLLER JAN.04.1994 PAGE: A. General Description — HT–6560A is a VL_Bus IDE controller which provides a control logic and data path between 486, 386 VL_Bus and IDE drives. The HT–6560A is fully compatible with the ANSI ATA revision 3.0 specification for IDE hard disk operation

PCnet32

Abstract: LADR2 smd transistor marking code EY ST7032 PQJ160 PQR160 79c965 S8-A marking AM486TM SMD MARKING CODE t2x
Contextual Info: Am79C965A PCnet -32 Single-Chip 32-Bit Ethernet Controller DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for 486 and Video Electronics Standards Association VESA local buses ■ Supports ISO 8802-3 (IEEE/ANSI 802.3) and Ethernet standards

PCNETISA -KT/2

Contextual Info: P RE LIM INARY a Advanced Micro Devices Am79C965 PCnet -32 Single-Chip 32-Bit Ethernet Controller DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for 386DX, 486, and Video Electronics Standards Association VESA local buses ■ Supports ISO 8802-3 (IEEE/ANSI 802.3) and

W06* MARKING smd code

Abstract: smd marking code W06 W08 mic SMD w06 DAT54 SMD805 smd w04 77 AMP 120527-1 M15N06 ADSP-21160
Contextual Info: Hardware Rev. 2.2 ADSP-21160 EZ-KIT Lite User Guide Part Number 500-00546 2000 Analog Devices, Inc. ALL RIGHTS RESERVED Analog Devices, Inc. Digital Signal Processing Division One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 617 329-4700 Copyright Information