1F0H-1F7H configuration pio
Abstract: S3 TRIO 64 HT6560A HT6560B DAT00 6560B DD15 LD11 LD12 LD04
Contextual Info: HT6560B Enhanced VL_Bus IDE Controller Features • • • • • • • • Pin-to-pin backward compatible with HT6560A VL_Bus IDE controller IDE interface to 486 and 386 DX/SX local bus VESA VL_Bus rev 1.0 compatible Connects directly to VL_Bus and IDE interface, no extra TTL needed
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ht6560bht6560aht-6560b/ccs37xn+81f0h-1f7h configuration pios3 trio 64dat006560bdd15ld11ld12ld04
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S3 TRIO 64
Abstract: HT6560A DD15 LA15 LD01 LD31 HC11111 ld18 DAT02 DAT06
Contextual Info: HT6560A VL_Bus IDE Controller Features • • • • • • VESA VL_Bus rev 1.0 compatible. Connects directly to VL_Bus and IDE interface no extra TTL needed. Supports 16 bits and 32 bits data transfer. Zero wait_state 50MHz operation. Support read pre-fetch, posted write and I/O
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ht6560a50mhz100-pin11111vy33sldddt2d222+1112345nn10sk589n96876ht-6560as3 trio 64dd15la15ld01ld31hc11111ld18dat02dat06
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ADR05
Abstract: 50 pins ide connector S3 TRIO 64 1F0H-1F7H ADR30 vl-bus ide controller DAT12 LD31 ADR27
Contextual Info: HT — 6560A VL_BUS IDE CONTROLLER JAN.04.1994 PAGE: A. General Description — HT–6560A is a VL_Bus IDE controller which provides a control logic and data path between 486, 386 VL_Bus and IDE drives. The HT–6560A is fully compatible with the ANSI ATA revision 3.0 specification for IDE hard disk operation
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adr0550 pins ide connectors3 trio 641f0h-1f7h+6adr30vl-buside controllerdat12ld31adr27
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