C7112-01
Abstract: C7110 Digital Pulse Counter Two Digit MSC7112-01SS MSC7110-01 MSC7112-01 QFP44-P-910-0 oki C7112 4 digits 12-segment led display oki c7112-01
Contextual Info: E2C0028-27-Y4 O K I Semiconductor M S C 7 1 10-01/7112-01 This version: N ov. 1997 P revious version: Jul. 1996 12-Segment x 16-Digit or 16-Segment x 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01 /M SC 7112-01 is a display controller to display the tim er of video tap e recorder,
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e2c0028-27-y4msc7110-01msc7112-0112-segment+1216-digit16-segment12-digitmsc7110-01/7112-01c7112-01c7110digital pulse counter two digitmsc7112-01ssqfp44-p-910-0oki c71124 digits 12-segment led displayoki c7112-01
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SN74ABT3611
Abstract: mdv 434
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC B S 127C - JULY 1992 - RE V IS E D A P R IL 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Empty Flag EF and Almost-Empty Flag (AE) Synchronized by CLKB 64 x 36 Clocked FIFO Buffering Data From
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sn74abt3611scbs127c120-pin132-pin+3cibl723762g5mdv 434
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Q1B-Q13B
Abstract: SSTV16859
Contextual Info: Revised March 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible
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SSTV16859
Contextual Info: Revised August 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible
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rand
Abstract: LTC2206IUK-14 LC2207-14 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14
Contextual Info: LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range)
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ltc2207-14/ltc2206-1414-bit105msps/80msps250mhz+1325vp-p700mhz947mw/762mw105mspsltc2207randltc2206iuk-14lc2207-14ltc2204ltc2205-14ltc2206ltc2206-14ltc2207-14
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D784038, 784038Y Sub-Series User’s Manual
Abstract: D784038
Contextual Info: MOS INTEGRATED CIRCUIT ¿1P D 7 8 4 0 3 5 , 7 8 4 0 3 6 , 7 8 4 0 3 7 , 7 8 4 0 3 8 16/8-BIT SINGLE-CHIP MICROCOMPUTER T h e /J P D 7 8 4 0 3 8 is a p ro d u c t o f th e ,u P D 7 8 4 0 3 8 s u b -s e r ie s in th e 7 8 K /IV s e rie s . It c o n ta in s v a rio u s p e rip h e ra l
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16/8-bit78k/ivx78k4iei-635+8iei-1213l-1207el-620l-1209iem-5068ei-603d784038, 784038y sub-series user’s manuald784038
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LTC2206CUK-14
Abstract: LTC2206IUK-14 pin diagram of 0809 adc LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 adc 0809 free
Contextual Info: LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO U FEATURES n n n n n n n n n n n n n n Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H
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ltc2207-14/ltc2206-1414-bit105msps/80msps250mhz+1425vp-p700mhz947mw/762mw105mspsltc2207ltc2206cuk-14ltc2206iuk-14pin diagram of 0809 adcltc2204ltc2205-14ltc2206ltc2206-14ltc2207-14adc 0809 free
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LTC1461
Abstract: LTC2205IUK-14#PBF LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14
Contextual Info: LTC2205-14 14-Bit, 65Msps ADC FEATURES DESCRIPTION n The LTC 2205-14 is a sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.
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ltc2205-1414-bit65msps700mhz+925vp-p140mhzltc1461ltc2205iuk-14#pbfltc2204ltc2206ltc2206-14ltc2207ltc2207-14
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43b transistor
Contextual Info: <8 M O T O R O LA — UC3842B, 43B U C 2842B ,43B High Performance Current Mode Controllers The UC3842B, UC3843B series are high performance fixed frequency current mode controllers. They are specifically designed for O ff-Line and d c -to -d c converter applications offering the designer a cost-effective
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uc3842b2842buc3843bec35-3c8+2ec35pcb143b transistor
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TL780-05C
Contextual Info: g M O T O R O L A TL780 Series Three-Term inal Positive Fixed Voltage Regulators This family of precision fixed voltage regulators are monolithic integrated circuits capable of driving loads in excess of 1.5 A. Innovative design concepts, coupled with advanced thermal layout techniques have resulted in
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C7110
Abstract: MSC7110-01 MSC7112-01 QFP44-P-910-0 C7112-01 b1517 4 digit 7 segment display 28 pin configuration
Contextual Info: E2C0028-27-Y4 ¡ Semiconductor MSC7110-01/7112-01 ¡ Semiconductor ThisMSC7110-01/7112-01 version: Nov. 1997 Previous version: Jul. 1996 12-Segment ¥ 16-Digit or 16-Segment ¥ 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01/MSC7112-01 is a display controller to display the timer of video tape recorder,
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e2c0028-27-y4msc7110-01/7112-0112-segment16-digit+1016-segment12-digitmsc7110-01/msc7112-01qfp44-p-910-0c7110msc7110-01msc7112-01c7112-01b15174 digit 7 segment display 28 pin configuration
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DB9 pin configuration
Abstract: LTC2208C-14 LTC2208 LTC2208-14 LTC6600-20
Contextual Info: LTC2208-14 14-Bit, 130Msps ADC FEATURES DESCRIPTION n The LTC 2208-14 is a 130Msps, sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized
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Contextual Info: E2C0028-27-Y4 O K I Semiconductor MSC7110-01/7112-01 Previous version: Jul. 1996 ~ 12-Segment x 16-Digit or 16-Segment x 12-Digit Display Controller/Driver GENERAL DESCRIPTION TheMSC7110-01 /M SC7112-01 is a display controller to display the timer of video tape recorder,
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SN74ACT7803
Abstract: SN74ACT7805 SN74ACT7813
Contextual Info: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS201 - MARCH 1991 - R E V IS E D APRIL 1992 D LPACKAGE TOP VIEW • Member of the Texas Instruments Widebus7" Family • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident • Read and Write Operations Synchronized
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Contextual Info: LTC2205-14 14-Bit, 65Msps ADC DESCRIPTION FEATURES n n n n n n n n n n n n n Sample Rate: 65Msps 78.3dB SNR and 98dB SFDR 2.25VP-P Range SFDR >90dB at 140MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H
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oki C7112-01
Abstract: C7112-01 Digital Pulse Counter Two Digit MSC7110-01 MSC7112-01 MSC7112-01SS QFP44-P-910-0 b1517
Contextual Info: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.
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oki c7112-01c7112-01digital pulse counter two digitmsc7110-01+4msc7112-01msc7112-01ssqfp44-p-910-0b1517
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Contextual Info: MITEL MT3170B/71B, MT3270B/71B, MT3370B/71B Wide Dynamic Range DTMF Receiver Features ISSUE 2 W ide dynam ic range 50dB DTMF Receiver May 1995 O rdering Inform ation Call progress (CP) detection via cadence indication MT3170/71 BE 8 Pin Plastic DIP MT3270/71 BE
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SUPI 3
Abstract: E20A LM6164 LM6264N LM6364N W10A 0101334
Contextual Info: LM6164/LM6264/LM6364 High Speed Operational Amplifier General Description Features The LM6164 family o f high-speed amplifiers exhibits an ex cellent speed-power product In delivering 300V per ¡ms and 175 MHz GBW stable down to gains as tow as + 5 with
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SSTV16859
Contextual Info: Preliminary Revised February 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset Preliminary General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The
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SSTV16859
Abstract: MO-205 MTD64 SSTV16859G SSTV16859MTD
Contextual Info: Revised January 2005 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible
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MSC7112-01
Abstract: oki C7112-01 Digital Pulse Counter Two Digit MSC7110-01 MSC7112-01SS QFP44-P-910-0 C7112-01
Contextual Info: FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 ¡ Semiconductor FEDL7110-03 This version: Sep. 2000 MSC7110-01/7112-01 Previous version: Nov. 1997 12-Segment ¥ 16-Digit or 16-Segment ¥ 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01/MSC7112-01 is a display controller to display the timer of video tape recorder,
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fedl7110-03msc7110-01/7112-0112-segment16-digit+1016-segment12-digitmsc7110-01/msc7112-01msc7112-01oki c7112-01digital pulse counter two digitmsc7110-01msc7112-01ssqfp44-p-910-0c7112-01
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api 4st 03
Abstract: qld133b A10C A12C A14C A15C IC51-1324-828 SN74ABT3612 B1494
Contextual Info: SN74ABT3612 64 x 36 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS129D - JULY 1992 - REVISED JANUARY 1994 EFB, FFB, AEB, and AFB Flags Synchronized by CLKB Passive Parity Checking on Each Port Parity Generation Can Be Selected for Each Port Low-Power Advanced BiCMOS Technology
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sn74abt361236-bit01d135565s303+8api 4st 03qld133ba10ca12ca14ca15cic51-1324-828b1494
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ltc146
Abstract: LTC1461 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 LTC6600-20
Contextual Info: LTC2205-14 14-Bit, 65Msps ADC U DESCRIPTIO FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 65Msps 78.3dB SNR and 98dB SFDR 2.25VP-P Range SFDR >90dB at 140MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range)
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Contextual Info: PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT juPD784035Y,784036Y,784037Y,784038Y 16/8-BIT SINGLE-CHIP MICROCONTROLLERS The /uPD784038Y is based on the ¿zPD784038 with an l2C bus control function appended, and is ideal for applications in audio-visual.
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