CYCLE23 Search Results

Contextual Info: MT4C2M8B1 S 2 MEG x 8 DRAM MICRON I TECHNOLOGY, INC. DRAM 2 MEG x 8 DRAM 5.0V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • JEDEC- and industry-standard x8 pinouts, timing, functions and packages • High-performance CMOS silicon-gate process • Single +5.0V ±10% power supply

MT4C4M4

Contextual Info: 1» PRELIMINARY MICRON I 4 MEG SEIUCOMXJCTOA INC. X MT2D48 8 DRAM MODULE 4 MEG X 8 DRAM DRAM MODULE FAST PAGE MODE FEATURES • Industry-standard pinout in a 30-pin, single-in-line memory module • High-performance CMOS silicon-gate process • Single 5V ±10% power supply

Contextual Info: MT4C1004J S 4 MEG X 1 DRAM |U|CRON 4 MEG x 1 DRAM DRAM 5V, STANDARD OR SELF REFRESH •n FEATURES • 1,024-cycle refresh distributed across 16ms (MT4C1004J) or 128ms (MT4C1004J S only) • Industry-standard pinout, timing, functions and packages • High-perform ance CM OS silicon-gate process

Contextual Info: PRELIMINARY M IC R O N I 4 MEG X SfcMCONOUCTORMC MT12D436 36, 8 MEG x 18 DRAM MODULE 4 MEG X 36, 8 MEG x 18 DRAM MODULE FAST PAGE MODE FEATURES OPTIONS MARKING • Tim ing 60ns access 70ns access • Packages Leadless 7 2 -pin Leadless 7 2 -pin Leadless 7 2 -pin

Contextual Info: PRELIMINARY M IC R O N ‘ » Eg R>4'n' DRAM MT4LC4M16R6 FEATURES • Single +3.3V +0.3V pow er supply • Industry-standard xl6 pinout, timing, functions and package • 12 row, 10 colum n addresses • High-performance CMOS silicon-gate process • All inputs, outputs and clocks are LVTTL-compatible

4LC1M16C3

Contextual Info: M i r n I r i M m t 4 L C 1 m i 6 C 3 L "• ■■ — 1 M E G X 16 D R A M DRAM 1 MEG x 16 DRAM 3.3V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES PIN ASSIGNMENT (Top View) • JE D E C - and in d u stry -stan d ard x1 6 tim ing , fu nctions, p in o u ts and p ackages

MT4C1004

Contextual Info: ADVANCE I^ IIC R O N 8 MEG DRAM _ MODULE X M T24D836 36, 16 M E G x 18 D R A M M O D U L E 8 MEG x 36,16 MEG 18 x FAST-PAGE-MODE FEATURES PIN ASSIGNMENT Top View • Industry-standard pinout in a 72-pin single-in-line package • High-perform ance CM OS silicon-gate process

DS 3107

Abstract: CBR TEST
Contextual Info: PRELIMINARY MICRON • 4 MEG DRAM MODULE 32, 8 MEG X X MT8D432 16 DRAM MODULE 4 MEG x 32, 8 MEG x 16 FAST PAGE MODE FEATURES • Industry-standard pinout in a 72-pin single-in-line package • High-perform ance CM OS silicon-gate process • Single 5V ±10% power supply

Contextual Info: ADVANCE MICRON • 4 MEG DRAM MODULE 36, 8 MEG X X MT12D436 18 DRAM MODULE 4 MEG x 36, 8 MEG x 18 fastpagem ode FEATURES • Industry-standard pinout in a 72-pin single-in-line package • High-perform ance CM O S silicon-gate process • Low profile 1.00" height D M and DG packages only

4c4007

Abstract: 4007J
Contextual Info: MT4C4007J L 1 MEG X 4 DRAM |u iic n o N 1 MEG x 4 DRAM DRAM 5V, EDO PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES PIN ASSIGNMENT (Top View) • • • • • S in g le + 5 V ± 1 0 % p o w er su p p ly JE D E C -sta n d a rd p in o u t and p ack ag es H ig h -p erfo rm a n ce C M O S silico n -g ate process

1024x8 memory

Contextual Info: PRELIMINARY 8 MEG x 8 EDO DRAM l^ ic iR o r s j MT4LC8M8P4 MT4LC8M8C2 DRAM FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x8 pinout, timing, functions and packages • 12 row, 11 column addresses C2 or 13 row, 10 column addresses (P4)

MT4LC16M4H9 1995

Abstract: 4LC16M MT4LC16M4H9
Contextual Info: ADVANCE M ir -D r n iV I I l,v " M L r . ! T MT4LC16M4G3/H9 16 MEG X 4 DRAM 16 MEG x 4 DRAM DRAM 3.3V, EDO PAGE MODE m FEATURES PIN ASSIGNMENT Top View • Sin gle + 3 .3 V ± 0 .3 V p o w er sup p ly • Ind u stry-stan d ard x4 pin o u t, tim in g , fu nctio n s and

MT4C1024

Abstract: MT4C1024-8
Contextual Info: ASO MT4C1024 883C 1 MEG X 1 DRAM AUSTIN SEMICONDUCTOR, INC. 1 MEG DRAM 1 DRAM X FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883 18-Pin DIP (D-6) FEATURES • Industry standard pinout and timing • All inputs, outputs and clocks are fully TTL

C1902

Contextual Info: MICRON TECHNOLOGY INC b lllS M T GGGS711 SSE D IMRN M l 4Ü1004J 883C 4 MF:G X 1 DRAM [ l i HZROfM MILITARY DRAM 4 MEG x 1 FAST PAGE MODE AVAILABLE AS MILITARY SPEOriCATONS PIN ASSIGNMENT Top View • SMD 5962-90622, Class M • JAN 5962-90622, Class B • MIL-STD-883, Class B

MT4C1024-8

Abstract: smd FAA smd marking S5B marking mpde G5705 Marking 62315 C19B MT4C1024
Contextual Info: MICRON TECHNOLOGY INC SSE D b l l l S ^ GODSbS'l TM1 RI1CRON IMRN MT4C1024 883C I MEG X 1 DRAM _ :_ T - < 4 t - 2 , v i £ MILITARY DRAM 1 MEG 1 DRAM X FAST PAGE MODE PIN ASSIGNMENT Top View • SMD (consult factory for reference number)

Contextual Info: PRELIMINARY M I I C R EDODRAM O N TECHNOLOGY INC 8 H R AM UnMIÏI M E G x 8 MT4LC8M8P4 MT4LC8M8C2 FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x8 pinout, timing, functions and packages • 12 row, 11 column addresses C2 or 13 row, 10 column addresses (P4)

Contextual Info: MT4LC4M4B1 S 4 MEG X 4 DRAM MICRON • TECHNOLOGY, MC. DRAM 4 MEG x 4 DRAM 2K REFRESH, 3.3V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • JEDEC- and industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process

Contextual Info: MICRON T E C H N O L O G Y INC 5SE J> • b l l l S M T 00041*10 fc.03 ■ MRN MT4C1004J 4 MEG X 1 DRAM MICRON DRAM 4 MEG X 1 DRAM DRAM FAST PAGE MODE FEATURES • Industry standard x l pinout, timing, functions and packages • High-performance, CMOS silicon-gate process

Contextual Info: MT4C1004J L 4 MEG X 1 DRAM [MICRON 4 MEG DRAM X 1 DRAM LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View • Industry standard x l pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V ±10% power supply

Contextual Info: ADVANCE |V|C=RON 16 MEG DRAM MODULE X MT9D169 9 DRAM MODULE 16 MEG x 9 DRAM FAST-PAGE-MODE FEATURES • Industry-standard pinout in a 30-pin single-in-line package • High-performance CMOS silicon-gate process • Single 5V ±10% power supply • All device pins are TTL-compatible

Contextual Info: MT4C1M16C3 S 1 MEG X 16 DRAM MICRON I TECHNOLOGY, INC. DRAM 1 MEG x 16 DRAM 5.0V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • JEDEC- and industry-standard xl6 timing, functions, pinouts and packages • High-performance CMOS silicon-gate process • Single +5.0V ±10% power supply

Contextual Info: PRELIMINARY M IC B Q N EDODRAM MT4LC8M8P4 MT4LC8M8C2 H R AM UrtMIVI FEATURES • Single +3.3V +0.3V pow er supply • Industry-standard x8 pinout, timing, functions and packages • 12 row, 11 colum n addresses C2 or 13 row, 10 colum n addresses (P4) • High-performance CMOS silicon-gate process

Contextual Info: MICRON' I 4 MEG x 16 E D O D R A lV l TECHNOLOGY, INC. n P A M MT4LC4M16R6 MT4LC4M16N3 U r iM IV I For the latest data sheet, please refer to the Micron Web site: www. micron, com/mti/msp/html/datasheet. html FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V power supply

MT4C1024

Contextual Info: MT4C1024 L 1 MEG X 1 DRAM |U|IC=RON 1 MEG x 1 DRAM DRAM STANDARD OR LOW POWER, EXTENDED REFRESH • 512-cycle refresh in 8ms (MT4C1024) or 64ms (MT4C1024 L) • Industry-standard xl pinout, timing, functions and packages • High-performance CMOS silicon-gate process