CYCLE22 Search Results

Contextual Info: AS7C 513 AS7C 3513 5V/3 .3V 32 Kx 16 CMOS SRAM Features • Organization: 32,768 w ords x 16 bits • High speed - 1 0 /1 2 /1 5 /2 0 ns address access time - 5 / 6 / 8 / 1 0 ns output enable access time • Low power consumption - Active: 504 m W max 20 ns cycle

PL129N

Abstract: 29f400 pl127 S29PL-N S71PL512ND0 sample code write buffer spansion
Contextual Info: S71PL512ND0 MirrorBit Flash Family Two S29PL256N Devices 32 M x 16-Bit CMOS 3.0-Volt only Simultaneous Read/Write, Page-Mode Flash Memory Data Sheet PRELIMINARY Notice to Readers: This document indicates states the current technical specifications regarding the Spansion product(s) described herein. The

Contextual Info: MT8D48 4 MEG X 8 DRAM MODULE MICRON I TECHNOLOGY. INC DRAM MODULE 4 MEG X 8 4 MEGABYTE, 5V, FAST PAGE MODE FEATURES • JEDEC- and industry-standard pinout in a 30-pin single-in-line m emory module SIMM • High-perform ance CM OS silicon-gate process • Single 5V ±10% power supply

Contextual Info: M I CR ON T E C H N O L O G Y INC 5SE ]> bl 1 1 S 4 e} OQOMfcjfl? 332 MICRON • 4 MEG TtCHNOLOGV INC DRAM MODULE X 8 IURN MT8D48 DRAM MODULE 4 MEG X 8 DRAM FAST PAGE MODE MT8D48 LOW POWER, EXTENDED REFRESH (MT8D48 L) FEATURES • Industry standard pinout in a 30-pin single-in-line

Contextual Info: ADVANCE 4 MEG X 64 DRAM SODIMM M IC R O N I TF.CHNOLOOY, INC. SMALL-OUTLINE DRAM MODULE MT4LDT464H X S FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-stand ard pinout in a 144-pin, sm all-outline, dual in-line m em ory m odule (DIMM) • 32MB (4 M eg x 64)

Contextual Info: MT10D25640 256K X 40 DRAM MODULE |U |IC = R O N 256K x 40 DRAM FAST PAGE MODE MT10D25640 LOW POWER, EXTENDED REFRESH (MT10D25640 L) FEATURES • • • • • • • • • PIN ASSIGNMENT (Top View) 72-pin single-in-line package High-performance, CMOS silicon-gate process.

Contextual Info: I^ IIC Z R O N DRAM 2 MEG W b MT20D240 40 DRAM MODULE 2 MEG x 40 DRAM _ FAST-PAGE-MODE MT20D240 LOW POWER, F EXTENDED Y T P K in P n RF REFRESH (MT20D240 L) M O D U LE IVI W X U FEATURES • • • • • • • OPTIONS 72-Pin SIMM MARKING • Timing

FPM DRAM 30-pin SIMM

Contextual Info: MT9D49 4 MEG X 9 DRAM MODULE |U |l = R O N DRAM MODULE 4 MEG X 9 4 MEGABYTE, 5V, FAST PAGE MODE FEATURES • JEDEC- and industry-standard pinout in a 30-pin single-in-line m em ory module (SIMM • High-perform ance CM OS silicon-gate process • Single 5V ±10% power supply

ea5 marking

Abstract: EA5 Ra module MT4C1004
Contextual Info: I^ IC R D N 4 MEG d ram _ _Ä _ k. . . _ V k i U M T8D48 DRAM M O D ULE 4 MEG x 8 DRAM FAST PAGE MODE MT8D48 LOW POWER, F EXTENDED y T F M D F n RF REFRESH (MT8D48 L) MODULE w X 8 FEATURES OPTIONS MARKING • Timing 60ns access 70ns access 80ns access -6

Contextual Info: ADVANCE MICRON MT9D436 X, MT18D836 X 4 MEG, 8 MEG x 36 DRAM MODULES DRAM MODULE 4 MEG, 8 MEG x 36 • TECHNOLOGY, NC. 16, 32 MEGABYTE, 5V, ECC, EDO PAGE MODE FEATURES PIN ASSIGNMENT Front View • Four CAS# ECC pinout in a 72-pin, single-in-line memory module (SIMM)

PL129N

Abstract: S29PL256N pl127 29PL256N S29PL127N S29PL-N Spansion NAND Flash DIE
Contextual Info: S29PL-N MirrorBit Flash Family 29PL256N, S29PL127N, S29PL129N, 256/128/128 Mb 16/8/8 M x 16-Bit CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory Data Sheet PRELIMINARY Notice to Readers: This document indicates states the current technical

Contextual Info: ADVANCE MICRON I 4 MEG TECHNOIOSV. INC. SMALL-OUTLINE DRAM MODULE 16 MEGABYTE, 3.3V, OPTIONAL EXTENDED REFRESH, FAST PAGE OR EDO PAGE MODE PIN ASSIGNMENT Front View • JEDEC- and industry-standard pinout in a 72-pin, small-outline, dual-in-line memory module (DIMM)

Contextual Info: MT4C1004J L 4 MEG X 1 DRAM (M IC R O N DRAM 4 MEG x 1 DRAM 5V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES • 1,024-cycle refresh distributed across 16ms (MT4C1004J) or 128ms (MT4C1004J L only) • Industry-standard pinout, timing, functions and packages

Contextual Info: MICRON 4 MEG X MT9D49 9 DRAM MODULE 4FAST MEG x 9 DRAM PAGE MODE (MT9D49 □PAM . _ MODULE m V U U L L . _ _ ^ LOW POWER, EXTEDEND REFRESH (MT9D49 L) FEATURES PIN ASSIGNMENT (Top View) OPTIONS o Vcc CAS DQ1 A0 A1 DQ2 A2 A3 Vss DQ3 A4 A5 DQ4 A6 A7 DQ5 A8

micron dram module 72pin simm

Contextual Info: fl/lir -C a r -IM « MT12D436, MT24D836 4 MEG, 8 MEG x 36 DRAM MODULES DRAM 4 MEG, 8 MEG x 36 M 16, 321 16 ’ 3 2 M EG A BY T E’ 5 V ’ FA ST PAGE MODE O D U L E FEATURES PIN ASSIGNMENT Front View • JEDEC- and industry-standard pinout in a 72-pin,

Hitachi DSA00164

Contextual Info: HM5165805AU-6 64M EDO DRAM 8-Mword 8-bit 4k refresh ADE-203-835B (Z) Rev. 2.0 Nov. 10, 1997 Description The Hitachi HM5165805AU-6 is CMOS dynamic RAM organized 8,388,608-word x 8-bit. It employs the most advanced CMOS technology for high performance and low power. HM5165805AU-6 offers

Contextual Info: M IC R O N 1 MEG X 8 MT8D18 DRAM MODULE 1 MEG X 8 DRAM DRAM MODULE FAST-PAGE-MODE (MT8D18 LOW POWER, EXTENDED REFRESH (MT8D18L) FEATURES PIN ASSIGNMENT (Top View) • In d u stry -stan d ard p in o u t in a 3 0 -p in sin g le-in -lin e p ack ag e • H ig h -p erfo rm a n ce C M O S silico n -g a te p ro cess

MT9D19

Contextual Info: [m ic r o n □PAM 1 MEG X MT9D19 9 DRAM MODULE 1MEG x 9 d ram _ FAST-PAGE-MODE MT9D19 LOW POWER, EXTENDED REFRESH (MT9D19 L) M O D U LLE . I— IVI V / FEATURES • Industry-standard pinout in a 30-pin single-in-line package • High-performance CMOS silicon-gate process

ic ns 4263

Contextual Info: MICRON 512K □PAM M O n ill m V U U U 51 2K _ X X MT20D51240 40 DRAM MODULE 40 DRAM FAST-PAGE-MODE MT20D51240 LOW POWER, EXTENDED REFRESH (MT20D51240 L) F L . FEATURES • • • • • • • OPTIONS M T20D 51240G • Packages Leadless 7 2 -pin SIM M (gold)

Contextual Info: [M IC R O N 1 MEG □RAM . _ MODULE W W MT10D140 40 DRAM MODULE 1 MEG x 40 DRAM _ _ ^ •■I w X FAST PAGE MODE MT10D140 lo w p o w e r, FEXTENDED Y T F N in P n RREFRESH F (MT10D140 L) L .I— FEATURES PIN ASSIGNMENT (Top View) 72-pin single-in-line package

Contextual Info: |U |C = R O N 4 MEG DRAM MODULE X 8 MT8D48 DRAM MODULE 4 MEG X 8 DRAM FAST PAGE MODE FEATURES PIN ASSIGNMENT Top View OPTIONS MARKING • Timing 60ns access 70ns access 80ns access -6 -7 • Packages Leadless 30 -pin SIM M 30-Pin SIMM (DE-3) Vcc CAS D01

MT42C4256Z

Contextual Info: l i f- V nib MICRON • 512K X MT20D51240 40 DRAM M O DULE 512K X 40 DRAM FAST PAGE MODE MT20D51240 LOW POWER, EXTENDED REFRESH (MT20D51240 L) FEATURES • • • • • • • • • 72-pin single-in-line package High-performance, CMOS silicon-gate process.

Contextual Info: |U |IC Z R O N MT2LDT132H X (L), MT4LDT232H(X)(L) 1 MEG, 2 MEG x 32 DRAM MODULES SMALL-OUTLINE 1 MEG, 2 MEG x 32 ORAM M O DULE 4, 8 M EGABYTE, 3.3V, O PTIO NAL E X T E N D E D R E F R E S H , FAST PAGE O R EDO PAGE M ODE FEATURES PIN ASSIGNMENT (Front View)

Contextual Info: M IC R O N 4 MEG 4 MEG DRAM MODULE X X MT9D49 9 DRAM MODULE 9 DRAM FAST-PAGE-MODE (MT9D49 LOW POWER, EXTEDEND REFRESH (MT9D49 L) FEATURES • Industry-standard pinout in a 30-pin single-in-line package • High-performance CMOS silicon-gate process • Single 5V ±10% power supply