CY7C381 Search Results

CY7C381P

Abstract: CY7C381P-0JC CY7C381P-XJC CY7C381P-XJI CY7C382P CY7C383A CY7C385P 100-Pin CPGA Package Pin-Out Diagram
Contextual Info: CY7C381P CY7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,

frws 5-4

Abstract: CY7C381-0JI C3816 G68 Package vhdl code for lte channel coding CY7C381 CY7C382 7c381 C381-9 C3812
Contextual Info: ¡iiö i id in tJ . iv iu iiu c iy , M u y u t ji i / , Revision: Wednesday, March 16,1994 ¥ CY7C381 CY7C382 cypress Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

Contextual Info: Revision: Monday, December 14,1992 a* CY7C381 CY7C382 PRELIMINARY H v p p rc c — Very High Speed IK 3K Gate CMOS FPGA SEMICONDUCTOR Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies

CY7C381A

Contextual Info: CY7C381A CY7C382A r# CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

CY7C381A

Abstract: CY7C381A-OJI CY7C382A
Contextual Info: CY7C381A CY7C382A # CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

CY7C381P-2JC

Abstract: CY7C381P-2JI vial
Contextual Info: 7C381A: Monday, September 20, 1993 Revision: October 9, 1995 CY7C381P CY7C382P UltraLogict Very High Speed 1K Gate CMOS FPGA Features D Very high speed D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies

pasic380

Abstract: CY7C382A-2JI CY7C381A CY7C381A-2JI
Contextual Info: CY7C381A CY7C382A # CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

C3816

Contextual Info: IIIWI IdlllW. IVIUMUdy, MUyU£>l I / , \ W £ Revision: Wednesday, March 16,1994 CY7C381 CY7C382 W CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

Contextual Info: CY7C381P CY7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,

382P

Contextual Info: CY7C381P CY7C382P W CYPRESS Features • UltraLogic Very High Speed IK Gate CMOS FPGA Functional Description — Fast, fu lly a u to m a tic p la ce and rou te Very high speed — W aveform sim u la tio n w ith back a n n otated net d elays — L oad ab le cou n ter freq u en cies

CY7C3381A

Abstract: CY7C3381A-0JC CY7C3381A-0JI CY7C3381A-XJC CY7C3382A CY7C3384A CY7C3385A 00252-B
Contextual Info: CY7C3381A CY7C3382A CYPRESS Features • Very high speed — Loadable counter frequencies greater than SO MHz — Chip-to-chip operating frequencies up to 60 MHz • Unparalleled FPGA performance for counters, data path, state machines, arithmetic, and random logic

XC3030-70PC84C

Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Contextual Info: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative

Contextual Info: tvjooim. iviunuay, oepiariiuei ¿u, i»»o Revision: Tuesday, May 10,1994 r# CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 120 MHz — Input + logic cell + output delays

Contextual Info: Revision: Thursday, September 24,1992 MUR 23 1993 PRELIMINARY CYPRESS s7-W '" SEMICONDUCTOR Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

HT12E HT12D

Abstract: Panasonic RELAY Cross Reference NEC OMRON N80C196KC16 MOS248 TDA2086A GOULD 500 COLOUR LCD DIGITAL STORAGE OSCILLOSCOPE 1NA114AP ICM72171 SL443A nec matrix Vacuum tube display
Contextual Info: Issued July 1996 021-928 Data Packs A-K RS data sheet/semiconductor manufacturers data sheet index Data Sheet Introduction RS data sheets form a unique source of detailed information regarding technical specifications, absolute maximum ratings and applications for engineers and designers working with RS products.

SKIIP 33 nec 125 t2

Abstract: skiip 613 gb 123 ct RBS 6302 ericsson SKIIP 513 gb 173 ct THERMISTOR ml TDK 150M pioneer PAL 010a Project Report of smoke alarm using IC 555 doc SKiip 83 EC 125 T1 ericsson RBS 6000 series INSTALLATION MANUAL Ericsson Installation guide for RBS 6302
Contextual Info: Discontinued and Superseded Stock Number History. This document contains Discontinued and Superseded Stock Number History. The information is listed in the following format: Stock Number: The original RS Stock Number of the item. Brief Description: The Invoice Description of the item.

TCA780

Abstract: TFK U 111 B TFK U 4614 B TFK S 186 P TFK U 217 B TFK BP w 41 n TFK BPW 41 N Tfk 880 TFK 148 TDSR 5150 G
Contextual Info: Industry Part Number 1N3245 1N3611GP 1N3612GP 1N3613GP 1N3614GP 1N3725 1N3957GP 1N4001GP 1N4002GP 1N4003GP 1N4004GP 1N4005GP 1N4006GP 1N4007GP 1N4245GP 1N4246GP 1N4247GP 1N4248GP 1N4249GP 1N4678.1N4717 1N4728A.1N4761A 1N4933GP 1N4934GP 1N4935GP 1N4936GP

7C385

Abstract: CY7C385 CY7C380
Contextual Info: CY7C380 Family Quick Power Calculator This brief is intended to provide a rapid method of calculating the approximate power consumed by a CY7C380 family device. Because the intent is a firstĆestimate calculation, some details are neĆ glected. The quiescent power of about 20 mW is not

ql16x24bl

Abstract: CF100 PF100 PF144 PL84 QL12X16B ABEL-HDL Reference Manual
Contextual Info: pASIC Device Kit Manual pASIC Device Kit Manual 981-0333-002 May 1995 090-0560-002 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or

ulc xc3030

Abstract: PQFP 176 Xilinx XC3090 altera EP300 EPM7128 Temic ulc xc3030 EPM7128 PLCC PLSI2032 Actel A1020 PLUS405
Contextual Info: ULC Reference Guide This reference guide lists most devices available for conversion. This list is not exhaustive, as new devices are added regularly. Additional devices not shown in this list may also be supported. Updated versions are available on the TEMIC web site. Check with factory if

CY7C3381A-0JC

Abstract: CY7C3381A-1JC CY7C3381A-1JI
Contextual Info: 7C3381A: Tuesday, October 5, 1993 Revision: October 9, 1995 CY7C3381A CY7C3382A UltraLogict 3.3V High Speed 1K Gate CMOS FPGA Features D Very high speed D D D D D D Functional Description Ċ PC and workstation platforms D Extensive 3rd party tool support Ċ Loadable counter frequencies

ACTEL CROSS REFERENCE

Abstract: atmel 424 actel a10v20b fpga da altera Actel Accelerator fpga XC4005E/XC4005 EPM5130 06M7374 Atmel 224 atmel 55000
Contextual Info: CMOS ASIC Converting FPGAs and PLDs to Atmel Gate Arrays Introduction Atmel is one of the only companies that designs and manufactures field programmable gate arrays FPGAs , programmable logic devices (PLDs) and high performance gate arrays. Atmel offers a seamless, direct conversion

CM4081

Abstract: CY7C385A-1AI CY7C385A CY7C386A
Contextual Info: CY7C385A CY7C386A CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

programmer manual EPLD cypress

Abstract: pASIC380 programming manual EPLD CY7C383A GAL programmer schematic
Contextual Info: filename: Tuesday, August 11, 1992 Revision: October 9, 1995 pASIC380 Family UltraLogict Very High Speed CMOS FPGAs D Robust routing resources Features D Very high speed D D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies