CY7C386A Search Results

CM4081

Abstract: CY7C385A-1AI CY7C385A CY7C386A
Contextual Info: CY7C385A CY7C386A CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

Contextual Info: CY7C385A CY7C386A i f CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

Contextual Info: m e iid iiitu v iu iiu ciy , ü u iiü io , i» » £ Revision: Tuesday, May 10,1994 CY7C385A CY7C386A CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

btd 41

Abstract: 160LEAD CPGA schematics
Contextual Info: CY7C385A CY7C386A ^ CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

CY7C386A-1AC

Abstract: CY7C386A-0AC 7C385A CY7C385A-2AC
Contextual Info: CY7C385A CY7C386A Very High Speed 4K 12K Gate CMOS FPGA Features D Very high speed D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies up to 110 MHz Ċ Input + logic cell + output delays under 6 ns Unparalleled FPGA performance for

Contextual Info: Revision: Thursday, September 24,1992 MUR 23 1993 PRELIMINARY CYPRESS s7-W '" SEMICONDUCTOR Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

ql16x24bl

Abstract: CF100 PF100 PF144 PL84 QL12X16B ABEL-HDL Reference Manual
Contextual Info: pASIC Device Kit Manual pASIC Device Kit Manual 981-0333-002 May 1995 090-0560-002 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or

CY62256LL-PC

Abstract: VIC068A-GC VIC64-NC VIC64-UMB PALCE22V10-JI PALC16L8Q PLD VME A113 CY7B923 JESD22-A113
Contextual Info: Cypress Semiconductor Product Reliability 1997 Published June, 1997 CYPRESS SEMICONDUCTOR PRODUCT RELIABILITY TABLE OF CONTENTS 1.0 OVERVIEW OF CYPRESS SEMICONDUCTOR TOTAL QUALITY MANAGEMENT SYSTEM. 1 2.0 ELECTRICAL AVERAGE OUTGOING QUALITY. 2

cy7c9101

Abstract: CY2901 CY7C190 PLD20RA10 CY2149 CY7C122 CY7C148 CY7C149 CY7C150 22V10-Macrocell
Contextual Info: Military Product Selector Guide Static RAMs Size Organization 64 64 1K 1K 4K 4K 4K 4K 4K 8K 8K 16K 16K 16K 16K 16K 16K 16K 16K 16K 32K 32K 32K 32K 32K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 256K 256K 256K 256K 256K 256K 256K 1M 1M

M61032

Abstract: amt 9545 CY27H010-J M53008 amt 9502 M54020
Contextual Info: RELIABILITY MONITOR SUMMARY QUARTERLY SUMMARY, QUARTER 2, 1996 July 3, 1996 PERFORMED PER THE REQUIREMENTS OF 25-00008, RELIABILITY MONITOR PROGRAM SPECIFICATION. ORIGINATOR: MUOI VU QUALITY ENGINEER DATE GEORGE PERREAULT RELIABILITY ENGINEERING MANAGER DATE

Contextual Info: CY7C387A CY7C388A ¿r C Y P R E S S Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iql of 12 mA and Iqh of 8 mA • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies

qml-38535

Abstract: smd marking mxc ASTM F1192M-95 5962-9559903MXC SC-117 JEDEC
Contextual Info: REVISIONS LTR DESCRIPTION A Removed vendor 65786, added vendor 0W GG6. Changed number of devices tested in O/V latch-up test from 5 to 3. Changed Table 1, ICC from 10 mA to 20 mA. Added footnote Table I, for Dynamic Dower, ksr B DATE (YR-MO-DA) Added case Y to cover D in arid arrav Dackaae. Editorial chanaes

pAS-IC380

Abstract: pASIC380 CY3500 MAX340 CY3014 cypress FLASH370 CY3538 20RA10 FLASH370 85-pin
Contextual Info: CY3500 t Device Programmer and Adapters Impulse3 Features System Requirements D D OEM version of Data I/O ChipLabt D D D Modular for easy deviceĆspecific support D D D D D DIP adapter included with base unit Programs all Cypress PROMs, EPROMs, PLDs, CPLDs, and

P/N146071

Contextual Info: /u o o /d /o d . 1»»*+ lu w ò u d y , iv id y Revision: Friday, June 24,1994 3f CYPRESS PRELIMINARY Very High Speed 8K 24K Gate CMOS FPGA — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iol of 12 mA and Ioh of 8mA • Flexible logic cell architecture

FPGA 144 CPGA 172 PLCC ASIC

Abstract: A144 CY7C386A CY7C387A CY7C387A-2GC CY7C388A CY7C387A2AI
Contextual Info: CY7C387A CY7C388A PRELIMINARY CYPRESS Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum I o l of 12 mA and Ioh °f • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies

C3807 equivalent

Contextual Info: PRELIMINARY r-’vpprcq SEMICONDUCTOR Very High Speed CMOS FPGAs • Input hysteresis provides high noise immunity • Thorough testability — Built-in scan path permits 100 per­ cent factory testing of logic and I/O cells — Automatic Test Vector Generation

programmer manual EPLD cypress

Contextual Info: l l lt fM d l l l t? . I U t? 5 U d y , M U y U 5 > l I I , ItKfcS Revision: Tuesday, June 28,1994 pASIC380 Family F/ CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz

Contextual Info: ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features • — PC an d w ork station p latform s — L oad ab le co u n ter freq u en cies grea ter th an 100 M H z • — Inp u t + logic cell + o u tp u t d elays u n d er 9 n s • U n p a ra lleled FP G A p erform an ce for

5962L0053605VYC

Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A