CY7C385A Search Results

CM4081

Abstract: CY7C385A-1AI CY7C385A CY7C386A
Contextual Info: CY7C385A CY7C386A CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

Contextual Info: CY7C385A CY7C386A i f CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

Contextual Info: m e iid iiitu v iu iiu ciy , ü u iiü io , i» » £ Revision: Tuesday, May 10,1994 CY7C385A CY7C386A CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

btd 41

Abstract: 160LEAD CPGA schematics
Contextual Info: CY7C385A CY7C386A ^ CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an­ notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

CY7C386A-1AC

Abstract: CY7C386A-0AC 7C385A CY7C385A-2AC
Contextual Info: CY7C385A CY7C386A Very High Speed 4K 12K Gate CMOS FPGA Features D Very high speed D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies up to 110 MHz Ċ Input + logic cell + output delays under 6 ns Unparalleled FPGA performance for

Contextual Info: Revision: Thursday, September 24,1992 MUR 23 1993 PRELIMINARY CYPRESS s7-W '" SEMICONDUCTOR Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays

ql16x24bl

Abstract: CF100 PF100 PF144 PL84 QL12X16B ABEL-HDL Reference Manual
Contextual Info: pASIC Device Kit Manual pASIC Device Kit Manual 981-0333-002 May 1995 090-0560-002 Data I/O has made every attempt to ensure that the information in this document is accurate and complete. Data I/O assumes no liability for errors, or for any incidental, consequential, indirect or

CY7C381A

Contextual Info: CY7C381A CY7C382A r# CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

cy7c9101

Abstract: CY2901 CY7C190 PLD20RA10 CY2149 CY7C122 CY7C148 CY7C149 CY7C150 22V10-Macrocell
Contextual Info: Military Product Selector Guide Static RAMs Size Organization 64 64 1K 1K 4K 4K 4K 4K 4K 8K 8K 16K 16K 16K 16K 16K 16K 16K 16K 16K 32K 32K 32K 32K 32K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 256K 256K 256K 256K 256K 256K 256K 1M 1M

CY7C381A

Abstract: CY7C381A-OJI CY7C382A
Contextual Info: CY7C381A CY7C382A # CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

pasic380

Abstract: CY7C382A-2JI CY7C381A CY7C381A-2JI
Contextual Info: CY7C381A CY7C382A # CYPRESS Very High Speed IK 3K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of designs using up to 100 percent of logic resources

C3807 equivalent

Contextual Info: PRELIMINARY r-’vpprcq SEMICONDUCTOR Very High Speed CMOS FPGAs • Input hysteresis provides high noise immunity • Thorough testability — Built-in scan path permits 100 per­ cent factory testing of logic and I/O cells — Automatic Test Vector Generation

programmer manual EPLD cypress

Contextual Info: l l lt fM d l l l t? . I U t? 5 U d y , M U y U 5 > l I I , ItKfcS Revision: Tuesday, June 28,1994 pASIC380 Family F/ CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz

Contextual Info: ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features • — PC an d w ork station p latform s — L oad ab le co u n ter freq u en cies grea ter th an 100 M H z • — Inp u t + logic cell + o u tp u t d elays u n d er 9 n s • U n p a ra lleled FP G A p erform an ce for