CKE 2009 AMP Search Results

W9864G2IH-6I

Abstract: w9864g2ih6i W9864G2IH6
Contextual Info: W9864G2IH 512K x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3

w9812g2ib-6i

Abstract: W9812G2IB
Contextual Info: W9812G2IB 1M x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES. 3

W9812G2IH-6

Abstract: W9812G2IH-6C W9812G2IH6I
Contextual Info: W9812G2IH 1M x 4 BANKS × 32BIT SDRAM Table of Contents1 GENERAL DESCRIPTION . 3 2 FEATURES. 3

h5tq1g83bfr

Abstract: HMT151R7BFR8C-G7 HMT151R7BFR4C H5TQ1G83BF
Contextual Info: 240pin DDR3 SDRAM Registered DIMM DDR3 SDRAM Registered DIMM Based on 1Gb B-die HMT112R7BFR8C HMT125R7BFR8C HMT125R7BFR4C HMT151R7BFR8C HMT151R7BFR4C *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 1.0 / Dec. 2009

DDR3L-1333

Contextual Info: 240pin DDR3L SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 1Gb T-die HMT112R7TFR8A HMT125R7TFR8A HMT125R7TFR4A HMT151R7TFR8A HMT151R7TFR4A *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Dec. 2009

8X13

Contextual Info: W9864G2IB 512K x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES. 3

Contextual Info: W9816G6IB 512K x 2 BANKS × 16 BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3

Contextual Info: W9864G6IH 1M x 4BANKS × 16BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3

Contextual Info: 240pin DDR3 SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 2Gb A-die HMT325R7AFR8A HMT351R7AFR8A HMT351R7AFR4A HMT31GR7AFR8A HMT31GR7AFR4A HMT42GR7AMR4A *Hynix Semiconductor reserves the right to change products or specifications without notice.

HMT112R7BFR8A-G7

Abstract: DDR3 RDIMM
Contextual Info: 240pin DDR3L SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 1Gb B-die HMT112R7BFR8A HMT125R7BFR8A HMT125R7BFR4A HMT151R7BFR8A HMT151R7BFR4A *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Nov. 2009

Contextual Info: 240pin DDR3 SDRAM Registered DIMM DDR3 SDRAM Registered DIMM Based on 1Gb T-die HMT112R7TFR8C HMT125R7TFR8C HMT125R7TFR4C HMT151R7TFR8C HMT151R7TFR4C *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Dec. 2009

H5TQ2G83afr

Contextual Info: 240pin DDR3 SDRAM Registered DIMM DDR3 SDRAM Registered DIMM Based on 2Gb A-die HMT325R7AFR8C HMT351R7AFR8C HMT351R7AFR4C HMT31GR7AFR8C HMT31GR7AFR4C HMT42GR7AMR4C *Hynix Semiconductor reserves the right to change products or specifications without notice.

W9825G6EH75I

Contextual Info: W9825G6EH 4 M x 4 BANKS × 16 BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3

0.65mm pitch BGA

Abstract: M52S16161A M52S16161A-10TG M52S16161A-8BG M52S16161A-8TG EsmtM52S16161A
Contextual Info: ESMT M52S16161A Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION 2.5V power supply LVCMOS compatible with multiplexed address Dual banks operation MRS cycle with address key programs CAS Latency 2 & 3

M52D16161A

Abstract: M52D16161A-10BG M52D16161A-10TG cke 2009 amp
Contextual Info: ESMT M52D16161A Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION The M52D16161A is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with high performance CMOS technology.

M12S64322A

Abstract: M12S64322A-6BG M12S64322A-6TG M12S64322A-7TG
Contextual Info: ESMT M12S64322A SDRAM 512K x 32 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y ORDERING INFORMATION JEDEC standard 2.5V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

H55S1262EFP

Contextual Info: 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O Specification of 128M 8Mx16bit Mobile SDRAM Memory Cell Array - Organized as 4banks of 2,097,152 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

HY57V561620FTP-H

Contextual Info: 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O 256M 16Mx16bit Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 4,194,304 x 16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

M52D16161A

Contextual Info: ESMT M52D16161A Operation Temperature Condition -40°C~85°C Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION 1.8V power supply LVCMOS compatible with multiplexed address Dual banks operation MRS cycle with address key programs

Contextual Info: ESMT SDRAM M52S128324A 1M x 32 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y JEDEC standard 2.5V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 1, 2 & 3 - Burst Length ( 1, 2, 4, 8 & full page )

h57v2562gtr-75C

Abstract: H57V2562GTR-60C h57v2562gtr75c
Contextual Info: 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O 256M 16Mx16bit Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 4,194,304 x 16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

CKE 2009

Abstract: H57V2562GFR-75L h57v2562gfr h57v2562gfr-75c h57v2562
Contextual Info: 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O 256M 16Mx16bit Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 4,194,304 x 16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

h57v2562

Abstract: h57v2562gt H57V256 H57V2582GTR-60I RA12 cke 2009
Contextual Info: 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O 256M 32Mx8bit Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 8,388,608 x 8 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

K4S281632K

Abstract: k4s281632k-uc K4S280832K k4s281632 K4S281632K-U
Contextual Info: K4S280832K K4S281632K Synchronous DRAM 128Mb K-die SDRAM Specification 54 TSOP-II with Lead-Free & Halogen-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE