CAWR Search Results

CAWR

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS T C 5 1 4 2 6 8 A P / A J / A Z - 7 0 , T C 5 1 4 2 6 8 A P / A J / A Z -80 T C 5 1 4 2 6 8 A P / A J / A Z -10 DESCRIPTION The T C 5 1 4 2 6 8 A P / A J / A Z is the n e w g e n e r a t i o n dy n a m i c R A M org a n i z e d 262,144 w o r d s by 4

CA3062

Abstract: CD40338 H5610 ic 4026b 3ssv monsanto
Contextual Info: ^ Tex a s In s t r u m e n t s CD4026B, CD4033B Types Data sheet acquired from Harris S em iconductor SCHS031 CMOS Decade Counters/Dividers High-Voltage Types <20-Volt Rating With Decoded 7-Segment Display Outputs and: Display Enable — CD4026B Ripple Blanking — CD40336

Contextual Info: M-*¡r 1I 1 ; a gKy*, ,R O Z Z3:0HHTiFÎGÂTI0M color — ~ :. bamd .s :- s e o i d t e _~ :& m o R m v z SIZE io ONLY =,02û'Miï£ L ¥ . % w £ lW ° • i& p m s m v . S EE MOTE .H D # . ' TSRST COLORANO TO BE. AP.PRÔX.

CAWR

Contextual Info: SN74LVC2T45-Q1 www.ti.com SCES818 – SEPTEMBER 2010 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS Check for Samples: SN74LVC2T45-Q1 FEATURES 1 • • • • • • • • Qualified for Automotive Applications

Contextual Info: PROOUCT NUMBER SEE U A E DIM A — .120 "3.05 2X DIM D - — - - 1 GUIDE PIN SHOWN mm m www % *c *m m v m i t cammmmm v n. nmtt-mt *» v n PTOOUCT NUMBER SEE TA0LC T HOUSING MATERIAL; POIYETHERIMIOE MEETS U L 9 4 - V - 0 SPECtFtCATlON. (D PW (3)

Contextual Info: Ipil 4,194,304 WORD x 1 BIT DYNAMIC RAM * This is advanced information and specifications are subject to change without notice. DESCRIPTION The TC514102J/Z is the new generation dynamic RAM organized 4,194,304 words by 1 bit. The TC514102J/Z utilizes TOSHIBA'S CMOS Silicon gate process technology as well

Z80 INTERFACING TECHNIQUES

Abstract: TC514102J t-rcj
Contextual Info: i 4,194,304 WORD x 1 BIT DYNAMIC RAM * This is advanced information and specifications are subject to change without notice, DESCRIPTION The TC514102J/Z is the new generation dynamic RAM organized 4,194,304 wo r d s b y 1 The TC514102J/Z utilizes T O S H I B A ’S CMOS Silicon gate process technology as well

SN74LVC2T45QDCURQ1

Abstract: CAWR
Contextual Info: SN74LVC2T45-Q1 www.ti.com SCES818 – SEPTEMBER 2010 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS Check for Samples: SN74LVC2T45-Q1 FEATURES 1 • • • • • • • • Qualified for Automotive Applications

SHC76

Abstract: ADC71
Contextual Info: BURR-BROW N« | b b SHC76 ] SAMPLE/HOLD AMPLIFIER FEATURES D ESC R IPTIO N • FAST 6/^ max ACQUISITION TIME (14-bit) T he S H C 76 is a fast, high-accuracy hybrid sa m p le /hold circuit suitable fo r use in high-resolution d a ta acquisition systems. • COMPATIBLE WITH HIGH RESOLUTION A/0

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS THM 91002S/L-85, 10 , 12 description! The THM91002S/L is a 1,048,576 words by 9 bits dynamic RAM module which assembled 9 pcs of TC511002J on the printed circuit board. The THM91002S/L is optimized for application to the systems which are required

24824

Abstract: CD4510 CD4516 15-V CD451 CD4510B CD4516B MC14516
Contextual Info: CD451O0, CD4516B Types CMOS Presettable Up/Down Counters High-Voltage Types 20-V o lt Rating . Features: PRESET ENABLE • Medium-speed operation fQl_ = 8 MHz typ. at 10 V C D 4 5 1 6 B -B in a ry T yp e ■ 5-V, 10-V, and 15-V parametric ratings

Z80 INTERFACING TECHNIQUES

Abstract: TC514 TC514402J CAWR
Contextual Info: - ^ ~ 1,048,576 WORD x 4 BIT DYNAMIC RAM * This is advanced information and specifications are subject to change without notice. DESCRIPTION The TC514402J/Z is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514402J/Z utilizes TOSHIBA’S CMOS Silicon gate process technology as well

4LC1M16

Abstract: 4C1M16 AS4CIM16 IS3015
Contextual Info: H ig h P e r fo r m a n c e 1 M X 16 CM OS DRAM A S 4 C 1 M I6 E 0 A S 4 L C I M 1 6EÓ 1M X J 6 CM OS EDO DRAM Prelim inary inform ation Features • R ead-m odify-w rite • TTL-com patible, three-state I /O • JEDEC standard package and pin o u t - 400 mil, 42-pin SOJ

Contextual Info: H igh P erform ance 1M X 16 CM OS DRAM II A S4C 1M I6E 0 AS4LC1M16EÖ II 1 M X 1 6 CM O S EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • 5V pow er supply 4C1M 16E0

4C1M16

Abstract: 1MX16 4LC1M16
Contextual Info: H ig h P erfo rm a n ce 1M X 16 CMOS DRAM AS4C1 M l 6E0 AS4LC1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1 ,0 4 8 ,5 7 6 words x 16 bits • H igh speed • Read-modify-write • TTL-compatibie, three-state I/O • JEDEC standard package and pinout

TC514

Abstract: TC514402J toshiba tc51 TC51440 TC514402Z
Contextual Info: TOSHIBA MEMORY E lectronic C omponents B usiness S ector 1,0 4 8 ,5 7 6 W ORD X 4 BIT T C 514 4 0 2 J / Z -80 T C 51440 2 J / Z -10 DYNAMIC RAM DESCRIPTION The TC514402J/Z is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514402J/Z utilizes TOSHIBA'S CMOS Silicon gate process technology as well

Contextual Info: H igh Performance 1MX16 CMOS DRAM •■ II AS4C1M16E0 AS4LC1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • SV power supply 4C1M16E0

Contextual Info: SN74LVC2T45-Q1 www.ti.com SCES818 – SEPTEMBER 2010 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS Check for Samples: SN74LVC2T45-Q1 FEATURES 1 • • • • • • • • Qualified for Automotive Applications

SN74LS324

Abstract: IC 7447 logic SN74LS327 LS324A SN54LS327 LS326 LS327 54LS324
Contextual Info: TYPES SNS4LS324 THRU SN54LS327. SN74LS324 THRU. SN74LS327 VOLTAGE-CONTROLLED OSCILLATORS _ B U L L E T I N WO. P L -8 7613472. O C T O B E H 1876 'LS325, LS326 and LS327 Hava Two Independent VCO's In a Single Package Output Frequency Set by Single External

sam8905

Abstract: sinus oscillator digital sound generator I211 409s TDA1541 sinus wave oscillator 1S84 TDA1541 Application Notes WD0-WD11
Contextual Info: B S E D • la 7 Ì 0 4 5 7 OOOQBfifc, fa ■ ON C H IP SYSTEMS OnCliip Systems SAM8905 digital sound generator/processor for musical applications G E N E R A L DESCRIPTIO N Ths SAM8905 is a'general purpose digital sound generator/processor designed Tor audio

3935-01

Abstract: LSE 0405
Contextual Info: H ig h P e rfo rm a n ce mm AS4C1 4 4 0 0 1M X4 II A S4C 14405 CMOS DRAM I M -bit X 4 CMOS DRAM Fast page m ode or EDO P relim in a ry in form ation Features • 1 0 2 4 re fresh cy d es, 16 m s refresh interval • O rganization: 1 ,0 4 8 ,5 7 6 w o rd s x 4 bits

FTC 580

Abstract: alpha detector diode smd SA2 FTC 380 manual TZA1029 QFP44 TZA1020 EFM noise reduction CAWR
Contextual Info: INTEGRATED CIRCUITS DATA SHEET TZA1029 Pre-amplifier for CD-RW systems Product specification Supersedes data of 2000 Oct 30 File under Integrated Circuits, IC01 2000 Oct 31 Philips Semiconductors Product specification Pre-amplifier for CD-RW systems TZA1029

M5M418160

Abstract: DQ0-DQ18 M5M418160B e5as
Contextual Info: MITSUBISHI LSI* M 5 M 4 1 8 1 6 0 B J ,T P - 6 ,- 7 ,- 6 S ,- 7 S FAST PAGE MODE 16777216-BIT 1Q48576-WORD BY 16-BIT DYNAMIC RAM DESCRIPTION This is a family of 1048576-word by 16-bit dynamic RAMS, fabricated with the high performance CMOS process,and is ideal for