1024CYC Search Results

Contextual Info: TMS44100, TMS44100P 4194304-BIT DYNAMIC RANDOM-ACCESS MEMORY SMHS410F-SEPTEMBER 1989-REVISED DECEMBER 1992 Single 5-V Power Supply ±10% Tolerance Performance Ranges: ACCESS ACCESS ACCESS SD P AC K A G E t (TOP VIEW) DJ P A C K A G E t (TOP VIEW) Organization . . . 4194 304 x 1

Contextual Info: TMS418160A 1048576 BY 16-BIT DYNAMIC RANDOM-ACCESS MEMORY S M K S 891C - A U G U S T 1996 - R EVISED O C TO BE R 1997 This data sheet is applicable to TMS418160As symbolized by Revision “E” and subsequent revisions as described in the device symbolization section.

44-800-p

Abstract: 44800P PIN DIAGRAM of IC AD 524 IN2045
Contextual Info: TMS44800, TMS44800P 524 288-WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES SMHS480B-AUGUST1992-REVISED DECEMBER 1992 This data sheet is applicable to all TMS44800/Ps symbolized with Revision“B" and subsequent revisions as described on page 22. * Organization . . . 524 288 x 8

TMS44410

Abstract: TMS44410-70
Contextual Info: TMS44410 1 048 576-WORD BY 4-BIT WRITE-PER-BIT DYNAMIC RANDOM-ACCESS MEMORY REV A - • Organization . . . 1 048 576 x 4 SMHS441 JANUARY 1991 DM and DJ Packaget Top View • Single 5-V Power Supply (±10% Tolerance) • Performance Ranges: ACCESS ACCESS ACCESS

Contextual Info: Datasheet Secondary power supply series for automotive 2.69 to 5.5V, 1.2V Output, 2.25MHz Synchronous Step-Down Converter BD90571EFJ-C ●General Description The BD90571EFJ-C is a synchronous rectification type step-down DC/DC converter with a 2.25MHz fixed

MSC2323258D

Contextual Info: This version: Mar. 3. 1999 Semiconductor MSC2323258D-xxBS4/DS4 2,097,152-word x 32-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSC2323258D-xxBS4/DS4 is a fully decoded, 2,097,152-word x 32-bit CMOS dynamic random access memory module composed of four 16Mb DRAMs in SOJ packages mounted with eight decoupling capacitors on a

TMS44101

Contextual Info: TMS44101 4194 304-BIT DYNAMIC RANDOM-ACCESS MEMORY REV A — SMHS411 — JA N U A R Y 1991 Organization . . . 4 194 304 x DC w C RAS C 1 1 ^ 2 3 Z 4 NC A 10 C 5 Single 5-V Power Supply ±10% Tolerance Performance Ranges: A0 C 9 A1 C 10 A2 C 11 READ ACCESS ACCESS ACCESS

TS-2321

Contextual Info: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS041D - JANUARY 1991 - REVISED JUNE 1995 Processed to MIL-STD-883, Class B Organization. . . 1 048 576 x 4 Single 5-V Power Supply ±10% Tolerance Performance Ranges: A CCESS ACCESS A CCESS

TMS44400

Abstract: TMS44400-10
Contextual Info: TMS44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY R E V A — S M H S 4 4 0 B — O C T O B E R 1 9 8 9 — R E V IS E D J A N U A R Y 1991 DM AND DJ P acka ge st Top View This Data Sheet Is Applicable to A ll TMS44400s Symbolized With Revision “B" and Subsequent

MSC23B236D

Contextual Info: This version: Mar. 3. 1999 Semiconductor MSC23B236D-xxBS8/DS8 2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The MSC23B236D-xxBS8/DS8 is a fully decoded, 2,097,152-word x 36-bit CMOS dynamic random access memory module composed of four 16Mb DRAMs in SOJ packages and four 2Mb DRAMs in SOJ packages mounted with

642006EGM1G09TD

Abstract: DIMM 1998
Contextual Info: 2M x 64 Bit 3.3V UNBUFFERED EDO DIMM Extended Data Out EDO DRAM DIMM 642006EGM1G09TD 168 Pin 2Mx64 EDO DIMM Unbuffered, 1k Refresh, 3.3V with SPD Pin Assignment Pin# General Description The module is a 2Mx64 bit, 9 chip, 3.3V, 168 Pin DIMM module consisting of (8) 1Mx16 (TSOP) DRAM

marking WMM

Abstract: RA52 1cas5 22r29
Contextual Info: 1 MEG x 4 DRAM DRAM QUAD CAS PARITY, FAST PAGE MODE FEATURES • Four independent CAS controls, allowing individual m anipulation to each of the four data In p u t/O u tp u t ports DQ1 through DQ4 . • Offers a single chip solution to byte level parity for 36bit w ords w hen using 1 Meg x 4 DRAMs for mem ory

S891C

Abstract: SS828
Contextual Info: TMS418160A 1048576 BY 16-BIT DYNAMIC RANDOM-ACCESS MEMORY S M K S891C -A U G U S T 1996-R E V IS E D OCTOBER 1997 This data sheet is applicable to TMS418160As symbolized by Revision “E ” and subsequent revisions as described in the device symbolization section.

Contextual Info: HM5118160BI Series 1048576-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-580A Z Rev. 1.0 May. 20, 1996 Description T he H itachi H M 5118160B I is a C M O S dynam ic R A M organized as 1,048,576-w ord x 16-bit. It em ploys the m ost advanced C M O S technology fo r high perform ance and low pow er. T he H M 5118160B I offers

95051

Contextual Info: G -LINK GLT440L08 512K X 8 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT Oct 2001 Rev.2.0 Features : Description : ∗ ∗ ∗ The GLT440L08 is a 524,288 x 8 bit highperformance CMOS dynamic random access memory. The GLT440L08 offers Fast Page mode with Extended Data Output has asymmetric address

Contextual Info: HY51V S 16163HG/HGL 1M x 16Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)16163HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16163HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)16163HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)16163HG/HGL to be

Contextual Info: G -LINK GLT440M04 1M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT Apr. 2002 Rev. 2.2 Features : Description : ∗ ∗ ∗ ∗ The GLT440M04 is a high-performance CMOS dynamic random access memory containing 4,194,304 bits organized in a x4 configuration. The GLT440M04 offers page

Contextual Info: HM5118160BI Series 1048576-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-580A Z Rev. 1.0 May. 20, 1996 Description The Hitachi HM5118160BI is a CMOS dynamic RAM organized as 1,048,576-word x 16-bit. It employs the most advanced CMOS technology for high performance and low power. The HM5118160BI offers

MSC23140D

Abstract: DS1067
Contextual Info: This version: Feb. 23. 1999 Semiconductor MSC23140D-xxBS10/DS10 1,048,576-word x 40-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The MSC23140D-xxBS10/DS10 is a fully decoded, 1,048,576-word x 40-bit CMOS dynamic random access memory module composed of ten 4Mb DRAMs in SOJ packages mounted with ten decoupling capacitors on a 72pin glass epoxy single-inline package. This module supports any application where high density and large capacity

Contextual Info: K7R323684C K7R321884C K7R320984C Preliminary TM 1Mx36, 2Mx18 & 4Mx9 QDR II b4 SRAM 36Mb QDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

ieee1149.1 cypress

Abstract: P-LBGA165-15x17-1
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

JTAG 10P

Abstract: K7R641882M-FC25 K7R640982M-FC25 K7R643682M-FC20
Contextual Info: K7R643682M K7R641882M K7R640982M Preliminary 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit, 8Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep, 14 2002 Advance 0.1 1. Update AC timing characteristics.

Contextual Info: K7I323684C K7I321884C Preliminary 1Mx36 & 2Mx18 DDRII CIO b4 SRAM 36Mb DDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: K7J643682M K7J641882M Preliminary 2Mx36 & 4Mx18 DDR II SIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition