CASCADING DIODE Search Results

Contextual Info: GD54/74LS161A SYNCHRONOUS 4 BIT COUNTERS; BINARY, DIRECT CLERAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

Contextual Info: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature • • • • • Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line • Diode-Clamped Inputs

74ls163 function table

Abstract: 74LS163 pin diagram of 74ls00 74LS00 clock frequency 1324NS pin configuration 74LS10 74LS00 function table pin configuration 74LS04 54LS 74LS00
Contextual Info: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature Pin Configuration • Internal Look-Ahead for Fast Counting • Carry Output for n-Bit Cascading • Synchronous Counting • Synchronously Programmable • Load Control Line • Diode-Clamped Inputs

74ls163 function table

Contextual Info: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

GD74LS161A

Abstract: 74LS161A 74LS161A pin diagram GD74LS02 54LS 74LS LS161A MA748
Contextual Info: GD54/74LS161A SYNCHRONOUS 4 BIT COUNTERS; BINARY, DIRECT CLERAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

tlc5490

Abstract: C3216X7R1H105KT TLC5940 pcb schematic led module display cascading diode strip Led driver schematic TLC5940 LED driver C1608X7R1H104KT design ideas HPA106
Contextual Info: Application Report SLVA242 – July 2006 LED Display System Module Using Cascading TLC5940 Devices Sahana Chandra . PMP Systems Power ABSTRACT Described in this document are application ideas and reference designs for the

Contextual Info: GD54/74S163A SYNCHRONOUS 4-BIT COUNTER: BINARY. SYNCHRONOUS CLEAR Feature Pin Configuration • • • • • • Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

Contextual Info: GD54/74LS161A SYNCHRONOUS 4 BIT COUNTERS; BINARY, DIRECT CLERAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output tor n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

54LS169DMQB

Abstract: 54LS169 54LS169FMQB 54LS169LMQB DM54LS169A DM54LS169AJ DM54LS169AW DM74LS169A DM74LS169AM DM74LS169AN
Contextual Info: 54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications Synchronous operation is provided by having all

MO-137

Abstract: SMS44
Contextual Info: SUMMIT SMS44 MICROELECTRONICS, Inc. Preliminary Highly Programmable Voltage Supply Controller and Supervisory Circuit FEATURES INTRODUCTION l Operational from any of four Voltage Monitoring Inputs l Programmable Closed Loop Power-up Cascading l Programmability allows monitoring any voltage

74LS193 function table

Contextual Info: GD54/74LS193 SYNCHRONOUS UP/DOWN DUAL CLOCK COUNTERS.BINARY WITH CLEAR Feature Pin Configuration • Cascading Circuitry Provided Internally • Synchronous Operation • Individual Preset to Each Flip-Flop • Fully Independent Clear Input INPUTS INPUTS Vcc

54ALS139

Abstract: 74ALS139
Contextual Info: SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SO AS204A -AP R IL 1982 - REVISED DECEMBER 1994 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception

Contextual Info: June 1989 Semiconductor 54LS169/DM54LS169A/DM74LS169A Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting ap­ plications. Synchronous operation is provided by having all

6002d

Contextual Info: SAMSUNG SEMICONDUCTOR BO01 KS54AHCT f O Q KS74AHCT D Dual 1-of-4 Decoders/Demultiplexers FEATURES DESCRIPTION • Designed specifically for high-speed memory decoders and data transmission systems • Incorporates 2 enable inputs to simplify cascading and/or data reception

cd74hct154e

Contextual Info: S CD74HC154, CD74HCT154 Semiconductor y High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer September 1997 Features Description • Two Enable Inputs to Facilitate Demultiplexing and Cascading Functions The Harris CD74HC154 and CD74HCT154 are 4-to-16 line

Contextual Info: SN54ALS169B, SN54AS169A, SN74ALS169B, SN74AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS125B - MARCH 1984 - REVISED DECEMBER 1994 ►Fully Synchronous Operation for Counting and Programming * Internal Carry Look-Ahead Circuitry for Fast Counting * Carry Output for n-Bit Cascading

pin diagram of 74160

Abstract: 74160 function table pin diagram of 74163 74160 pin 74163 pin configuration 74ls161 counter pin configuration 74160 logic diagram of 74160 logic diagram 74160 74160 counter
Contextual Info: Signetics 74160, 74161, 74163, LS160A, LS161A, LS162A, LS163A Counters '160, '162 BCD Decade Counter '161, '163 4-Bit Binary Counter Logic Products Product Specification FEATURES • Synchronous counting and loading • Two Count Enable inputs for nbit cascading

74S280

Abstract: 74LS N74S280N S280 4 bit even and odd parity checker
Contextual Info: 74S280 Signetics Parity Generator/Checker 9-Bit O dd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180

Step-Up WLED Bias Supplies

Abstract: WSOIC-28 MP3399-12-STRING OVP24 M3100V AM3490N 5V-to-28V MP3399EY-LF-Z 260 c15 100v 12p
Contextual Info: MP3399 The Future of Analog IC Technology 12-String, Cascading White LED Driver For Extending LED Channels DESCRIPTION FEATURES The MP3399 is a step-up controller with 12channel current sources designed for driving the WLED arrays for large size LCD panel

54LS169

Abstract: 54LS169DMQB 54LS169FMQB 54LS169LMQB DM54LS169AJ DM54LS169AW DM74LS169AM DM74LS169AN E20A DM74LS169
Contextual Info: , June 1989 54LS169/DM54LS169A/DM74LS169A Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting ap­ plications. Synchronous operation is provided by having all

MC14585B

Abstract: MC14XXXBCL MC14XXXBCP MC14XXXBD
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14585B 4-Bit Magnitude Comparator The MC14585B 4–Bit Magnitude Comparator is constructed with complementary MOS CMOS enhancement mode devices. The circuit has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three cascading inputs

LS169A

Contextual Info: LS169A National Semiconductor 54LS169/DM54LS169A/DM74LS169A Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting ap­ plications. Synchronous operation is provided by having all

Contextual Info: 74S280 Signetìcs Parity Generator/Checker 9-Bit O dd/Even Parity G enerator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180

1Y3C

Abstract: SN54ALS139 SN74ALS139 c9aaqb c9aa
Contextual Info: SN74ALS139, SN54ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS D2661, APRIL 1982 - REVISED M AY 1986 • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems • Incorporates 2 Enable Inputs to Simplify Cascading and/or Data Reception