BV48 Search Results

VFBGA

Abstract: BV48A BV36A
Contextual Info: Package Diagram VFBGA 36-Lead VFBGA 6 x 8 x 1 mm BV36A 51-85149-* 1 Package Diagram 48-Lead VFBGA (6 x 8 x 1 mm) BV48A 51-85150-* 2

Contextual Info: CY7C1069G CY7C1069GE PRELIMINARY 16-Mbit 2 M words x 8 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (2 M words × 8 bit) Static RAM with Error-Correcting Code (ECC) Features an error indication pin (ERR) that signals the host processor in the case of an ECC error-detection and correction event.

Contextual Info: PRELIMINARY CY7C1061G/CY7C1061GE 16-Mbit 1 M words x 16 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) Features To access devices with a single chip enable input, assert the chip

Contextual Info: CY62136EV30 MoBL 2-Mbit 128 K x 16 Static RAM 2-Mbit (128 K × 16) Static RAM Features Functional Description • Very high speed: 45 ns ■ Wide voltage range: 2.20 V to 3.60 V ■ Pin compatible with CY62136CV30 ■ Ultra low standby power ❐ Typical standby current: 1 A

CY62137EV30

Contextual Info: CY62137EV30 MoBL 2-Mbit 128 K x 16 Static RAM 2-Mbit (128 K × 16) Static RAM Features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL®) in portable applications such as cellular telephones. The device also has an

WCMC4016V9B-55

Contextual Info: WCMC4016V9B ADVANCE INFORMATION 4Mb 256K x 16 Pseudo Static RAM Features HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High

Contextual Info: PHOTOFET OPTOCOUPLERS OPTOELECTRONICS H11F1 H11F2 H11F3 The H11F series has a gallium-aluminum-arsenide infrared emitting diode coupled to a symmetrical bilateral silicon photodetector. The detector is electrically isolated from the input and performs like an ideal isolated FET

CYK128K16SCCB

Contextual Info: CYK128K16SCCB 2-Mbit 128K x 16 Pseudo Static RAM Functional Description[1] Features • Advanced low power MoBL architecture The CYK128K16SCCB is a high-performance CMOS pseudo static RAMs (PSRAM) organized as 128K words by 16 bits that supports an asynchronous memory interface. This device

Contextual Info: CY81U032X16A7A MoBL3 PRELIMINARY 32M 2M x 16 SRAM Features (OE HIGH), or during a write operation (CE LOW and WE LOW). • Very high speed: 70 ns • Advanced low-power MoBL architecture • Wide voltage range: — VCC range: 2.3V – 3.1V • • •

14027

Abstract: BV48A WCMC1616V9X WCMC1616V9X-FI70
Contextual Info: ADVANCE INFORMATION WCMC1616V9X 1Mb x 16 Pseudo Static RAM Features • 1T Cell, PSRAM Architecture • High speed: 70 ns • Wide Voltage range: — VCC range: 2.7V to 3.3V • Low active power — Typical active current: 2 mA @ f = 1 MHz — Typical active current: 13 mA @ f = fMAX

cy7c1019dv

Contextual Info: CY7C1019DV33 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features Functional Description • Pin- and function-compatible with CY7C1019CV33 ■ High speed ❐ tAA = 10 ns ■ Low Active Power ❐ ICC = 60 mA @ 10 ns ■ Low CMOS Standby Power

CY62157EV30LL-45BVXI

Abstract: TSOP 48 thermal resistance
Contextual Info: CY62157EV30 MoBL 8-Mbit 512 K x 16 Static RAM 8-Mbit (512 K × 16) Static RAM Features Functional Description • Thin small outline package (TSOP) I package configurable as 512 K × 16 or 1 M × 8 static RAM (SRAM) ■ High speed: 45 ns ■ Temperature ranges

P4505

Abstract: intel i5 520M BGA1288 core i7 i5-520M i5-520E CATERR intel celeron 633 AA-64 CATERR DEASSERTED
Contextual Info: Intel CoreTM i7-660UE, i7-620LE/ UE, i7-610E, i5-520E, i3-330E and Intel® Celeron® Processor P4505, U3405 Series Datasheet Addendum August 2010 Document Number: 323178-003 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

WCMC2016V9B-55

Abstract: z1012
Contextual Info: WCMC2016V9B 2-Mbit 128K x 16 Pseudo Static RAM Features can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2

Contextual Info: CY7C1069DV33 16-Mbit 2 M x 8 Static RAM 16-Mbit (2 M × 8) Static RAM Functional Description Features • High speed ❐ tAA = 10 ns The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

BGA1288

Abstract: rPGA-988 circuit diagram laptop motherboard CN80617005745AB arrandale cn80617 i3 laptop MOTHERBOARD pcb CIRCUIT diagram i7-600 Mobile INTEL nehalem CPU arrandale MSR
Contextual Info: Intel Core i7-600, i5-500, i5-400 and i3-300 Mobile Processor Series Datasheet — Volume One This is volume 1 of 2. Refer to document 322813 for Volume 2 January 2010 Document Number: 322812-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

A23 851 diode

Abstract: 741p BGA1288 AC-DC Adapter circuit diagram laptop motherboard power supply diagram of laptop motherboard do regulator 2gb 3.3v AK66 Diode AF51 intel Penryn
Contextual Info: Intel Celeron® Mobile Processor P4000 and U3000 Series Datasheet Revision 001 October 2010 Document Number: 324471-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS

CY62167DV18L-55

Abstract: CY62167DV18LL-55 CY62167DV18
Contextual Info: CY62167DV18 MoBL2 PRELIMINARY 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Voltage range: 1.65V to 1.95V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz — Typical active current: 15 mA @ f = fMAX

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05391 Spec Title: CY62158DV30 MoBL, 8-Mbit 1024K x 8 MoBL Static RAM Sunset Owner: Anuj Chakrapani (AJU) Replaced by: None CY62158DV30 MoBL 8-Mbit (1024K x 8) MoBL® Static RAM This is ideal for providing More Battery Life (MoBL®) in

Contextual Info: CY62168EV30 MoBL 16-Mbit 2 M x 8 Static RAM 16-Mbit (2 M × 8) Static RAM Features automatic power-down feature that significantly reduces power consumption by 90% when addresses are not toggling. Placing the device into standby mode reduces power consumption by

CY62167DV30L-55ZI

Abstract: CY62167DV30
Contextual Info: CY62167DV30 MoBL 16-Mbit 1M x 16 Static RAM Features reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed

Contextual Info: PRELIMINARY CY7C1061G/CY7C1061GE 16-Mbit 1 M words x 16 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) Features To access devices with a single chip enable input, assert the chip

ultra fine pitch BGA

Abstract: CY62147CV25 CY62147CV30 CY62147CV33 CY62147V
Contextual Info: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are

CYK128K16SCCB

Contextual Info: CYK128K16SCCB 2-Mbit 128K x 16 Pseudo Static RAM Functional Description[1] Features • Advanced low-power MoBL architecture The CYK128K16SCCB is a high-performance CMOS pseudo static RAM (PSRAM) organized as 128K words by 16 bits that supports an asynchronous memory interface. This device