AS3A Search Results

Contextual Info: IB M 1 1 D 1 3 2 5 B IB M 1 1 D 2 3 2 5 B 1M/2M x 32 DRAM Module Features • 72-Pin JEDEC Standard Single-In-Une Memory Modules • Performance: -6 0 -7 0 ! t RAc ! RA S A ccess Tim e 60ns 70ns ; tcAc I C A S A ccess Tim e 15ns 18ns I aa ; Access Tim e From Address

TK 69 TSOP

Abstract: 1024KX16 M5M4V16169RT-10 1-OF-128 7WB1 AD011 M5M4V16169TP-10
Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 2.0 M5M4V16169RT-10,-12,-15 16MCDRAM:16M(1024K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec. and some of the contents are subject to change without notice.

AS3A

Abstract: K802
Contextual Info: LMV951 www.ti.com SNOSAI3C – OCTOBER 2006 – REVISED APRIL 2013 LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option Check for Samples: LMV951 FEATURES DESCRIPTION • • • • • The LMV951 amplifier is capable of operating at

Contextual Info: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V4169TP is a 4 M - b it Cached DRAW which integrates input registers, a 262, 1 4 4 - word by 1 6 - bit dynamic memory array and a 1024-w o rd by 1 6 - bit static

Contextual Info: LMV951 www.ti.com SNOSAI3C – OCTOBER 2006 – REVISED APRIL 2013 LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option Check for Samples: LMV951 FEATURES DESCRIPTION • • • • • The LMV951 amplifier is capable of operating at

Contextual Info: LM V951 LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option Texa s In s t r u m e n t s Literature Number: SNOSAI3B Sem iconductor LMV951 1V, 2.7 M Hz, R ail-to-R ail Input and O u tp u t A m p lifie r w ith S hutdow n O ption

"Vibration Sensor"

Abstract: AS0B 018H 10MW dual slope adc
Contextual Info: HT46R73D-3 Dual Slope A/D Type 8-Bit OTP MCU with LCD Features • Operating voltage: · Internal 12kHz RC oscillator fSYS=4MHz: 2.2V~5.5V fSYS=8MHz: 3.3V~5.5V · External 32.768kHz Crystal oscillator · HALT function and wake-up feature reduce power · Three system oscillators:

QorIQ Debug and Performance Monitoring

Abstract: mesa Toshiba MeP secure toshiba mep architecture
Contextual Info: P3041 QorIQ Integrated Multicore Communication Processor Family Reference Manual Document Number: P3041RM Rev 3, 6/2013 P3041 QorIQ Integrated Multicore Communication Processor Family Reference Manual, Rev. 3, 6/2013 2 Freescale Semiconductor, Inc. Contents

Contextual Info: MITSUBISHI LS Is TARGET SPEC REV. 2.0 M5M4V16169RT-10,-12,-15 16MCDRAM:16M(1024K-WQRD BY 16-BIT) CACHED DRAM WITH 16K (1024-WQRD BY 16-BIT) SRAM P relim in ary This document is a preliminary Target Spec, and some of the contents are subject to change without notice.

Contextual Info: MITSUBISHI LSIs M 5 M 4 V 1 6 1 6 9 T P - 1 0 ,- 1 2 ,- 1 5 16M CDRAM16M 1024K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V16169TP is a 16M-bit Cached DRAM which integrates input registers, a 1048576-word by 1 6 - bit

Contextual Info: REV22 MITSUBISHI LSIs M5M4V16169RT-10,-12,-15 16M C D R A M :16M (1024K -W Q R D BY 16-BIT) CACHED DRAM W ITH 16K (1024-W Q RD BY 16-BIT) SRAM DESCRIPTION The M 5M 4V16169R T is a 16M-bit Cached DRAM which integrates input registers, a 1,048,576-word by 16-bit dynamic memory array and a 1024

Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 2.1 M5M4V4169TP-15,-20 4MCDRAM:4M(256K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec, and some of the contents are subject to change without notice

sram 3.3 16bit

Contextual Info: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V4169TP is a 4 M - b it Cached DRAM which integrates input registers, a 262, 1 4 4 - word by 1 6 - bit dynamic memory array and a 1 0 2 4 -word by 1 6 - bit static

M5M4V4169

Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 1.1 M5M4V4169CRT-10,-12,-15 4MCDRAM:4M(256K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM PIN CONFIGURATION (TOP VIEW) Preliminary This document is a preliminary Target Spec. and some of the contents are

Contextual Info: LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option General Description Features The LMV951 amplifier is capable of operating at supply voltages from 0.9V to 3V with guaranteed specs at 1V and 1.8V single supply. The input common mode range extends to both power supply

M5M4V4169TP

Abstract: m5m4v4169 1kx16 M5M4V4169TP-15 M5M4V4169TP15 M5M4V4169TP20 256K x 16-Bit CMOS Dynamic RAM fast page 70 AS3A
Contextual Info: TARGET SPEC REV. 4.0 - M 5M 4V 41 69T P -15,-20 4MCDRAM:4M(256K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec, and some of the contents are subject to change without notice. DESCRIPTION

Contextual Info: LMV951 LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option Literature Number: SNOSAI3B LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option General Description Features The LMV951 amplifier is capable of operating at supply voltages from 0.9V to 3V with guaranteed specs at 1V and 1.8V

LMV951

Abstract: LMV951MK LMV951MKX MK06A AS3A
Contextual Info: LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option General Description Features The LMV951 amplifier is capable of operating at supply voltages from 0.9V to 3V with guaranteed specs at 1V and 1.8V single supply. Typical 1.0V supply, unless otherwise noted

Contextual Info: »o ^T S ìT ^Ì@ ìì ;f¿A? q'iÜ¡ MITSUBISHI LSIs M5M4V4169TP-15,-20 Oct 26,1992 4MCDRAM:4M 262144 - WORD BY 16 - BIT) Cache DRAM with 16k (1D24-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec, and some of the contents are subject to change without notice.

DW311

Abstract: radix-4 DIT FFT C code Am29540 64 point dit radix-4 w2k 29 JDW-3
Contextual Info: Am29540 Am29540 Programmable FFT Address Sequencer DISTINCTIVE CHARACTERISTICS • • • • Decimation in frequency DIF or decimation in time (DIT) FFT algorithms supported 40-pin DIP package, 5 volt single supply Generates data and coefficient addresses

1kx16

Abstract: diode wb1 SCR table TK 69 TSOP
Contextual Info: MITSUBISHI LSIs M5M4V16169DTP/RT-7,-8,-10,-15 16MCDRAM:16M 1M-WORD BY 16-BIT CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec. and some of the contents are subject to change without notice. PINCONFIGURATION

Contextual Info: HT46R73D-3 Dual Slope A/D Type 8-Bit OTP MCU with LCD Features • Operating voltage: · Internal 12kHz RC oscillator fSYS=4MHz: 2.2V~5.5V fSYS=8MHz: 3.3V~5.5V · External 32.768kHz Crystal oscillator · HALT function and wake-up feature reduce power · Three system oscillators:

Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 1.1 M5M4V4169CRT-10,-12,-15 4MCDRAM:4M(256K-W ORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary P IN C O N F IG U R A T IO N T h is d o c u m e n t is a p re lim in a ry T a rg e t S p ec, and so m e o f th e co n te n ts are

LMV951

Abstract: LMV951MK LMV951MKX MK06A AC line snubber 3 phase 1000 amp
Contextual Info: LMV951 1V, 2.7 MHz, Rail-to-Rail Input and Output Amplifier with Shutdown Option General Description Features The LMV951 amplifier is capable of operating at supply voltages from 0.9V to 3V with guaranteed specs at 1V and 1.8V single supply. The input common mode range extends to both power supply