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    Contextual Info: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V4169TP is a 4 M - b it Cached DRAW which integrates input registers, a 262, 1 4 4 - word by 1 6 - bit dynamic memory array and a 1024-w o rd by 1 6 - bit static


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    m5m4v4169tp-15256k-word16-bit1024-word+5m5m4v4169tp1024-w4v4169tp-154v4169tp-20d054772 PDF